System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

This book describes the state-of-the-art in energy efficient, fault-tolerant embedded systems. It covers the entire product lifecycle of electronic systems design, analysis and testing and includes discussion of both circuit and system-level approaches. Readers will be enabled to meet the conflicting design objectives of energy efficiency and fault-tolerance for reliability, given the up-to-date techniques presented.

Modern embedded systems deploy several hardware accelerators, in a heterogeneous manner, to deliver high-performance computing. Among such devices, graphics processing units (GPUs) have earned a prominent position by virtue of their immense computing power. However, a system design that relies on sheer throughput of GPUs is often incapable of satisfying the strict power- and time-related constraints faced by the embedded systems. This thesis presents several system-level software techniques to optimize the design of GPU-based embedded systems under various graphics and non-graphics applications. As compared to the conventional application-level optimizations, the system-wide view of our proposed techniques brings about several advantages: First, it allows for fully incorporating the limitations and requirements of the various system parts in the design process. Second, it can unveil optimization opportunities through exposing the information flow between the processing components. Third, the techniques are generally applicable to a wide range of applications with similar characteristics. In addition, multiple system-level techniques can be combined together or with application-level techniques to further improve the performance. We begin by studying some of the unique attributes of GPU-based embedded systems and discussing several factors that distinguish the design of these systems from that of the conventional high-end GPU-based systems. We then proceed to develop two techniques that address an important challenge in the design of GPU-based embedded systems from different perspectives. The challenge arises from the fact that GPUs require a large amount of workload to be present at runtime in order to deliver a high throughput. However, for some embedded applications, collecting large batches of input data requires an unacceptable waiting time, prompting a trade-off between throughput and latency. We also develop an optimization technique for GPU-based applications to address the memory bottleneck issue by utilizing the GPU L2 cache to shorten data access time. Moreover, in the area of graphics applications, and in particular with a focus on mobile games, we propose a power management scheme to reduce the GPU power consumption by dynamically adjusting the display resolution, while considering the user's visual perception at various resolutions. We also discuss the collective impact of the proposed techniques in tackling the design challenges of emerging complex systems. The proposed techniques are assessed by real-life experimentations on GPU-based hardware platforms, which demonstrate the superior performance of our approaches as compared to the state-of-the-art techniques.

"This book focuses on information technology using sustainable green computing to reduce energy and resources used"--Provided by publisher.

The book is designed to serve as a textbook for courses offered to graduate and undergraduate students enrolled in electronics and electrical engineering and computer science. This book attempts to bridge the gap between electronics and computer science students, providing complementary knowledge that is essential for designing an embedded system. The book covers key concepts tailored for embedded system design in one place. The topics covered in this book are models and architectures, Executable Specific Languages – SystemC, Unified Modeling Language, real-time systems, real-time operating systems, networked embedded systems, Embedded Processor architectures, and platforms that are secured and energy-efficient. A major segment of embedded systems needs hard real-time requirements. This textbook includes real-time concepts including algorithms and real-time operating system standards like POSIX threads. Embedded systems are mostly distributed and networked for deterministic responses. The book covers how to design networked embedded systems with appropriate protocols for real-time requirements. Each chapter contains 2-3 solved case studies and 10 real-world problems as exercises to provide detailed coverage and essential pedagogical tools that make this an ideal textbook for students enrolled in electrical and electronics engineering and computer science programs.

To the hard-pressed systems designer this book will come as a godsend. It is a hands-on guide to the many ways in which processor-based systems are designed to allow low power devices. Covering a huge range of topics, and co-authored by some of the field’s top practitioners, the book provides a good starting point for engineers in the area, and to research students embarking upon work on embedded systems and architectures.

This book constitutes the refereed proceedings of the First International Conference on Advances in Parallel, Distributed Computing Technologies and Applications, PDCTA 2011, held in Tirunelveli, India, in September 2011. The 64 revised full papers were carefully reviewed and selected from over 400 submissions. Providing an excellent international forum for sharing knowledge and results in theory, methodology and applications of parallel, distributed computing the papers address all current issues in this field with special focus on algorithms and applications, computer networks, cyber trust and security, wireless networks, as well as mobile computing and bioinformatics.