The research described in this monograph concerns the formal specification and compositional verification of real-time systems. A real-time programminglanguage is considered in which concurrent processes communicate by synchronous message passing along unidirectional channels. To specifiy functional and timing properties of programs, two formalisms are investigated: one using a real-time version of temporal logic, called Metric Temporal Logic, and another which is basedon extended Hoare triples. Metric Temporal Logic provides a concise notationto express timing properties and to axiomatize the programming language, whereas Hoare-style formulae are especially convenient for the verification of sequential constructs. For both approaches a compositional proof system has been formulated to verify that a program satisfies a specification. To deduce timing properties of programs, first maximal parallelism is assumed, modeling the situation in which each process has itsown processor. Next, this model is generalized to multiprogramming where several processes may share a processor and scheduling is based on priorities. The proof systems are shown to be sound and relatively complete with respect to a denotational semantics of the programming language. The theory is illustrated by an example of a watchdog timer.

The research described in this monograph concerns the formal specification and compositional verification of real-time systems. A real-time programminglanguage is considered in which concurrent processes communicate by synchronous message passing along unidirectional channels. To specifiy functional and timing properties of programs, two formalisms are investigated: one using a real-time version of temporal logic, called Metric Temporal Logic, and another which is basedon extended Hoare triples. Metric Temporal Logic provides a concise notationto express timing properties and to axiomatize the programming language, whereas Hoare-style formulae are especially convenient for the verification of sequential constructs. For both approaches a compositional proof system has been formulated to verify that a program satisfies a specification. To deduce timing properties of programs, first maximal parallelism is assumed, modeling the situation in which each process has itsown processor. Next, this model is generalized to multiprogramming where several processes may share a processor and scheduling is based on priorities. The proof systems are shown to be sound and relatively complete with respect to a denotational semantics of the programming language. The theory is illustrated by an example of a watchdog timer.

With the rapid growth of networking and high-computing power, the demand for large-scale and complex software systems has increased dramatically. Many of the software systems support or supplant human control of safety-critical systems such as flight control systems, space shuttle control systems, aircraft avionics control systems, robotics, patient monitoring systems, nuclear power plant control systems, and so on. Failure of safety-critical systems could result in great disasters and loss of human life. Therefore, software used for safety critical systems should preserve high assurance properties. In order to comply with high assurance properties, a safety-critical system often shares resources between multiple concurrently active computing agents and must meet rigid real-time constraints. However, concurrency and timing constraints make the development of a safety-critical system much more error prone and arduous. The correctness of software systems nowadays depends mainly on the work of testing and debugging. Testing and debugging involve the process of de tecting, locating, analyzing, isolating, and correcting suspected faults using the runtime information of a system. However, testing and debugging are not sufficient to prove the correctness of a safety-critical system. In contrast, static analysis is supported by formalisms to specify the system precisely. Formal verification methods are then applied to prove the logical correctness of the system with respect to the specification. Formal verifica tion gives us greater confidence that safety-critical systems meet the desired assurance properties in order to avoid disastrous consequences.

The research contained in this book represents work on the specification and verification of real-time systems using CSP.

This volume presents the proceedings of the Sixth International Joint Conference on the Theory and Practice of Software Engineering, TAPSOFT '95, held in Aarhus, Denmark in May 1995. TAPSOFT '95 celebrates the 10th anniversary of this conference series started in Berlin in 1985 to bring together theoretical computer scientists and software engineers (researchers and practitioners) with a view to discussing how formal methods can usefully be applied in software development. The volume contains seven invited papers, among them one by Vaugham Pratt on the recently revealed bug in the Pentium chip, and 44 revised full papers selected from a total of 147 submissions. In addition the TAPSOFT '95 proceedings contains 10 tool descriptions.

The three-volume set LNCS 12476 - 12478 constitutes the refereed proceedings of the 9th International Symposium on Leveraging Applications of Formal Methods, ISoLA 2020, which was planned to take place during October 20–30, 2020, on Rhodes, Greece. The event itself was postponed to 2021 due to the COVID-19 pandemic. The papers presented were carefully reviewed and selected for inclusion in the proceedings. Each volume focusses on an individual topic with topical section headings within the volume: Part I, Verification Principles: Modularity and (De-)Composition in Verification; X-by-Construction: Correctness meets Probability; 30 Years of Statistical Model Checking; Verification and Validation of Concurrent and Distributed Systems. Part II, Engineering Principles: Automating Software Re-Engineering; Rigorous Engineering of Collective Adaptive Systems. Part III, Applications: Reliable Smart Contracts: State-of-the-art, Applications, Challenges and Future Directions; Automated Verification of Embedded Control Software; Formal methods for DIStributed COmputing in future RAILway systems.

Formal Description Techniques and Protocol Specification, Testing and Verification addresses formal description techniques (FDTs) applicable to distributed systems and communication protocols. It aims to present the state of the art in theory, application, tools and industrialization of FDTs. Among the important features presented are: FDT-based system and protocol engineering; FDT-application to distributed systems; Protocol engineering; Practical experience and case studies. Formal Description Techniques and Protocol Specification, Testing and Verification comprises the proceedings of the Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols and Protocol Specification, Testing and Verification, sponsored by the International Federation for Information Processing, held in November 1998, Paris, France. Formal Description Techniques and Protocol Specification, Testing and Verification is suitable as a secondary text for a graduate-level course on Distributed Systems or Communications, and as a reference for researchers and practitioners in industry.