This volume introduces innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance VLIW microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations.

Harnessing the power of software platforms: what executives and entrepreneurs must know about how to use this technology to transform industries and how to develop the strategies that will create value and drive profits. Software platforms are the invisible engines that have created, touched, or transformed nearly every major industry for the past quarter century. They power everything from mobile phones and automobile navigation systems to search engines and web portals. They have been the source of enormous value to consumers and helped some entrepreneurs build great fortunes. And they are likely to drive change that will dwarf the business and technology revolution we have seen to this point. Invisible Engines examines the business dynamics and strategies used by firms that recognize the transformative power unleashed by this new revolution—a revolution that will change both new and old industries. The authors argue that in order to understand the successes of software platforms, we must first understand their role as a technological meeting ground where application developers and end users converge. Apple, Microsoft, and Google, for example, charge developers little or nothing for using their platforms and make most of their money from end users; Sony PlayStation and other game consoles, by contrast, subsidize users and make more money from developers, who pay royalties for access to the code they need to write games. More applications attract more users, and more users attract more applications. And more applications and more users lead to more profits. Invisible Engines explores this story through the lens of the companies that have mastered this platform-balancing act. It offers detailed studies of the personal computer, video game console, personal digital assistant, smart mobile phone, and digital media software platform industries, focusing on the business decisions made by industry players to drive profits and stay a step ahead of the competition. Shorter discussions of Internet-based software platforms provide an important glimpse into a future in which the way we buy, pay, watch, listen, learn, and communicate will change forever. An electronic version of this book is available under a Creative Commons license.

Welcome to the proceedings of PATMOS 2003. This was the 13th in a series of international workshops held in several locations in Europe. Over the years, PATMOS has gained recognition as one of the major European events devoted to power and timing aspects of integrated circuit and system design. Despite its signi?cant growth and development, PATMOS can still be considered as a very informal forum, featuring high-level scienti?c presentations together with open discussions and panel sessions in a free and relaxed environment. This year, PATMOS took place in Turin, Italy, organized by the Politecnico di Torino, with technical co-sponsorship from the IEEE Circuits and Systems Society and the generous support of the European Commission, as well as that of several industrial sponsors, including BullDAST, Cadence, Mentor Graphics, STMicroelectronics, and Synopsys. The objective of the PATMOS workshop is to provide a forum to discuss and investigate the emerging problems in methodologies and tools for the design of new generations of integrated circuits and systems. A major emphasis of the technical program is on speed and low-power aspects, with particular regard to modeling, characterization, design, and architectures.

This book constitutes the refereed proceedings of the 14th International Workshop on Power and Timing Optimization and Simulation, PATMOS 2004, held in Santorini, Greece in September 2004. The 85 revised papers presented together with abstracts of 6 invited presentations were carefully reviewed and selected from 152 papers submitted. The papers are organized in topical sections on buses and communication, circuits and devices, low power issues, architectures, asynchronous circuits, systems design, interconnect and physical design, security and safety, low-power processing, digital design, and modeling and simulation.

The International Workshop on Power and Timing Modeling, Optimization, and Simulation PATMOS 2002, was the 12th in a series of international workshops 1 previously held in several places in Europe. PATMOS has over the years evolved into a well-established and outstanding series of open European events on power and timing aspects of integrated circuit design. The increased interest, espe- ally in low-power design, has added further momentum to the interest in this workshop. Despite its growth, the workshop can still be considered as a very - cused conference, featuring high-level scienti?c presentations together with open discussions in a free and easy environment. This year, the workshop has been opened to both regular papers and poster presentations. The increasing number of worldwide high-quality submissions is a measure of the global interest of the international scienti?c community in the topics covered by PATMOS. The objective of this workshop is to provide a forum to discuss and inves- gate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies. A major emphasis of the technical program is on speed and low-power aspects with particular regard to modeling, char- terization, design, and architectures. The technical program of PATMOS 2002 included nine sessions dedicated to most important and current topics on power and timing modeling, optimization, and simulation. The three invited talks try to give a global overview of the issues in low-power and/or high-performance circuit design.