New Approaches to Image Processing Based Failure Analysis of Nano-Scale ULSI Devices introduces the reader to transmission and scanning microscope image processing for metal and non-metallic microstructures. Engineers and scientists face the pressing problem in ULSI development and quality assurance: microscopy methods can't keep pace with the continuous shrinking of feature size in microelectronics. Nanometer scale sizes are below the resolution of light, and imaging these features is nearly impossible even with electron microscopes, due to image noise. This book presents novel "smart" image processing methods, applications, and case studies concerning quality improvement of microscope images of microelectronic chips and process optimization. It explains an approach for high-resolution imaging of advanced metallization for micro- and nanoelectronics. This approach obviates the time-consuming preparation and selection of microscope measurement and sample conditions, enabling not only better electron-microscopic resolution, but also more efficient testing and quality control. This in turn leads to productivity gains in design and development of nano-scale ULSI chips. The authors also present several approaches for super-resolving low-resolution images to improve failure analysis of microelectronic chips. - Acquaints users with new software-based approaches to enhance high-resolution microscope imaging of microchip structures - Demonstrates how these methods lead to productivity gains in the development of ULSI chips - Presents several techniques for the superresolution of images, enabling engineers and scientists to improve their results in failure analysis of microelectronic chips

The Handbook of Silicon Based MEMS Materials and Technologies, Second Edition, is a comprehensive guide to MEMS materials, technologies, and manufacturing that examines the state-of-the-art with a particular emphasis on silicon as the most important starting material used in MEMS. The book explains the fundamentals, properties (mechanical, electrostatic, optical, etc.), materials selection, preparation, manufacturing, processing, system integration, measurement, and materials characterization techniques, sensors, and multi-scale modeling methods of MEMS structures, silicon crystals, and wafers, also covering micromachining technologies in MEMS and encapsulation of MEMS components. Furthermore, it provides vital packaging technologies and process knowledge for silicon direct bonding, anodic bonding, glass frit bonding, and related techniques, shows how to protect devices from the environment, and provides tactics to decrease package size for a dramatic reduction in costs. - Provides vital packaging technologies and process knowledge for silicon direct bonding, anodic bonding, glass frit bonding, and related techniques - Shows how to protect devices from the environment and decrease package size for a dramatic reduction in packaging costs - Discusses properties, preparation, and growth of silicon crystals and wafers - Explains the many properties (mechanical, electrostatic, optical, etc.), manufacturing, processing, measuring (including focused beam techniques), and multiscale modeling methods of MEMS structures - Geared towards practical applications rather than theory

In Advanced ULSI interconnects – fundamentals and applications we bring a comprehensive description of copper-based interconnect technology for ultra-lar- scale integration (ULSI) technology for integrated circuit (IC) application. In- grated circuit technology is the base for all modern electronics systems. You can ?nd electronics systems today everywhere: from toys and home appliances to a- planes and space shuttles. Electronics systems form the hardware that together with software are the bases of the modern information society. The rapid growth and vast exploitation of modern electronics system create a strong demand for new and improved electronic circuits as demonstrated by the amazing progress in the ?eld of ULSI technology. This progress is well described by the famous “Moore’s law” which states, in its most general form, that all the metrics that describe integrated circuit performance (e. g. , speed, number of devices, chip area) improve expon- tially as a function of time. For example, the number of components per chip d- bles every 18 months and the critical dimension on a chip has shrunk by 50% every 2 years on average in the last 30 years. This rapid growth in integrated circuits te- nology results in highly complex integrated circuits with an increasing number of interconnects on chips and between the chip and its package. The complexity of the interconnect network on chips involves an increasing number of metal lines per interconnect level, more interconnect levels, and at the same time a reduction in the interconnect line critical dimensions.

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.