CMOS technology has now reached a state of evolution, in terms of both frequency and noise, where it is becoming a serious contender for radio frequency (RF) applications in the GHz range. Cutoff frequencies of about 50 GHz have been reported for 0.18 æm CMOS technology, and are expected to reach about 100 GHz when the feature size shrinks to 100 nm within a few years. This translates into CMOS circuit operating frequencies well into the GHz range, which covers the frequency range of many of today's popular wireless products, such as cell phones, GPS (Global Positioning System) and Bluetooth. Of course, the great interest in RF CMOS comes from the obvious advantages of CMOS technology in terms of production cost, high-level integration, and the ability to combine digital, analog and RF circuits on the same chip. This book discusses many of the challenges facing the CMOS RF circuit designer in terms of device modeling and characterization, which are crucial issues in circuit simulation and design.

The boom of mobile communications leads to an increasing request of low cost and low power mixed mode integrated circuits. Maturity of SOI technology, and recent progresses of MOSFET's microwave performances, explain the success of silicon as compared to III-V technologies for low-cost multigigahertz analog applications. The design of efficient circuits requires accurate, wide-band models for both active and passive elements. Within this frame, passive and active components fabricated in SOI technologies have been studied. Various topologies of integrated transmission lines, like Coplanar Waveguides or thin film microstrip lines, have been analyzed. Also, a new physical model of integrated inductors has been developed. This model, based on a coupled line analysis of square spiral inductors, is scalable and independent of the technology used. Inductors with various spacing between strips, conductor widths, or number of turns can be simulated on different multi-layered substrates. Each layer that composes the substrate is defined using its electrical properties (permittivity, permeability, conductivity). The performances of integrated sub-micron MOSFETs are analyzed. New alternative structures of transistor (the Graded Channel MOSFET and the Dynamic Threshold MOSFET) are proposed to increase the performances of a CMOS technology for for analog, low power, low voltage, and microwave applications. They are studied from Low to High frequency. The graded channel MOSFET is an asymmetric doped channel MOSFET's which bring solutions for the problems of premature drain break-down, hot carrier effects, and threshold voltage (Vth) roll-off issues in deep submicrometer devices. The GCMOS processing is fully compatible with the conventional SOI MOSFET process flow, with no additional steps needed. The dynamic threshold voltage MOS is a MOS transistor for which the gate and the body channel are tied together. All DTMOS electrical properties can be deduced from standard MOS theory by introducing Vbs = Vgs. The main advantage of DTMOS over conventional MOS is its higher drive current at low bias conditions. To keep the body to source current as low as possible, the body bias voltage must be kept lower than 0.7 V. It seems obvious that the DTMOS transistor is an attractive component for low voltage applications.

This book serves as a hands-on guide to RF tunable devices, circuits and subsystems. An innovative of modeling for tunable devices and networks is described, along with a new tuning algorithm, adaptive matching network control approach, and novel filter frequency automatic control loop. The author provides readers with the necessary background and methods for designing and developing tunable RF networks/circuits and tunable RF font-ends, with an emphasis on applications to cellular communications.

Advances in Imaging and Electron Physics merges two long-running serials--Advances in Electronics and Electron Physics and Advances in Optical and Electron Microscopy. This series features extended articles on the physics of electron devices (especially semiconductor devices), particle optics at high and low energies, microlithography, image science and digital image processing, electromagnetic wave propagation, electron microscopy, and the computing methods used in all these domains. - Contributions from leading authorities - Informs and updates on all the latest developments in the field

Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, retraces the evolution of SOI materials, devices and circuits over a period of roughly twenty years. Twenty years of progress, research and development during which SOI material fabrication techniques have been born and abandoned, devices have been invented and forgotten, but, most importantly, twenty years during which SOI Technology has little by little proven it could outperform bulk silicon in every possible way. The turn of the century turned out to be a milestone for the semiconductor industry, as high-quality SOI wafers suddenly became available in large quantities. From then on, it took only a few years to witness the use of SOI technology in a wealth of applications ranging from audio amplifiers and wristwatches to 64-bit microprocessors. This book presents a complete and state-of-the-art review of SOI materials, devices and circuits. SOI fabrication and characterization techniques, SOI CMOS processing, and the physics of the SOI MOSFET receive an in-depth analysis. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, also describes the properties of other SOI devices, such as multiple gate MOSFETs, dynamic threshold devices and power MOSFETs. The advantages and performance of SOI circuits used in both niche and mainstream applications are discussed in detail. The SOI specialist will find this book invaluable as a source of compiled references covering the different aspects of SOI technology. For the non-specialist, the book serves an excellent introduction to the topic with detailed, yet simple and clear explanations. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition is recommended for use as a textbook for classes on semiconductor device processing and physics at the graduate level.

Most of the recent texts on compact modeling are limited to a particular class of semiconductor devices and do not provide comprehensive coverage of the field. Having a single comprehensive reference for the compact models of most commonly used semiconductor devices (both active and passive) represents a significant advantage for the reader. Indeed, several kinds of semiconductor devices are routinely encountered in a single IC design or in a single modeling support group. Compact Modeling includes mostly the material that after several years of IC design applications has been found both theoretically sound and practically significant. Assigning the individual chapters to the groups responsible for the definitive work on the subject assures the highest possible degree of expertise on each of the covered models.