Build high-performance, energy-efficient circuits with this cutting-edge guide to designing, modeling, analysing, implementing and testing new mm-wave systems.

This book compiles and presents the research results from the past five years in mm-wave Silicon circuits. This area has received a great deal of interest from the research community including several university and research groups. The book covers device modeling, circuit building blocks, phased array systems, and antennas and packaging. It focuses on the techniques that uniquely take advantage of the scale and integration offered by silicon based technologies.

Build high-performance, spectrally clean, energy-efficient mm-wave power amplifiers and transmitters with this cutting-edge guide to designing, modeling, analysing, implementing and testing new mm-wave systems. Suitable for students, researchers and practicing engineers, this self-contained guide provides in-depth coverage of state-of-the-art semiconductor devices and technologies, linear and nonlinear power amplifier technologies, efficient power combining systems, circuit concepts, system architectures and system-on-a-chip realizations. The world's foremost experts from industry and academia cover all aspects of the design process, from device technologies to system architectures. Accompanied by numerous case studies highlighting practical design techniques, tradeoffs and pitfalls, this is a superb resource for those working with high-frequency systems.

This book focuses on the development of design techniques and methodologies for 60-GHz and E-band power amplifiers and transmitters at device, circuit and layout levels. The authors show the recent development of millimeter-wave design techniques, especially of power amplifiers and transmitters, and presents novel design concepts, such as “power transistor layout” and “4-way parallel-series power combiner”, that can enhance the output power and efficiency of power amplifiers in a compact silicon area. Five state-of-the-art 60-GHz and E-band designs with measured results are demonstrated to prove the effectiveness of the design concepts and hands-on methodologies presented. This book serves as a valuable reference for circuit designers to develop millimeter-wave building blocks for future 5G applications.

This book provides a detailed review of millimeter-wave power amplifiers, discussing design issues and performance limitations commonly encountered in light of the latest research. Power amplifiers, which are able to provide high levels of output power and linearity while being easily integrated with surrounding circuitry, are a crucial component in wireless microwave systems. The book is divided into three parts, the first of which introduces readers to mm-wave wireless systems and power amplifiers. In turn, the second focuses on design principles and EDA concepts, while the third discusses future trends in power amplifier research. The book provides essential information on mm-wave power amplifier theory, as well as the implementation options and technologies involved in their effective design, equipping researchers, circuit designers and practicing engineers to design, model, analyze, test and implement high-performance, spectrally clean and energy-efficient mm-wave systems.

Emerging millimeter-wave applications, including high speed wireless communication using 5G standards, favor silicon technologies, both CMOS and SiGe, for transceiver design, due to the high level of integration at reduced cost and availability of high speed transistors. Efficient, linear and reliable high power amplifiers with broad bandwidth are needed at the transmitter front-ends to enable high data rate links at long distances. But the low breakdown voltage of CMOS FETs due to gate length scaling and other transistor non-idealities make the design of high power mm-wave amplifiers in deeply scaled CMOS nodes difficult. Circuit techniques like FET stacking provide a compact and efficient way of implementing high power mm-wave amplifiers reliably. Other power combining techniques such as on-chip and spatial power combining can be used along with FET stacking to achieve even higher output power levels. This thesis investigates the design of high power mm-wave power amplifiers at frequencies from 28 GHz to 94 GHz, using multiple power combining techniques. This work extends the use of FET stacking for high power PA design to 94 GHz. A 3-stack PA designed in 45 nm CMOS SOI with 17 dBm output power and 9% efficiency is presented. Using this PA as front-end, a CMOS PA-antenna array is designed, to additionally provide spatial power combining. The CMOS chip has a 2 x 4 array of pseudo-differential power amplifiers along with the signal distribution networks and pre-drivers. A quartz wafer with a 2 x 4 array of differential microstrip antennas deposited on it is placed on top of the CMOS chip, electromagnetically coupled to the PA outputs on the CMOS chip. The spatially power combined PA-antenna array achieved a measured equivalent isotropic radiated power (EIRP) of 33 dBm and an estimated output power of 24 dBm at 94 GHz. Modulated data measurements at 3 Gbps (375 MS/s, 256 QAM) speed using digital pre-distortion are demonstrated with the PA-antenna array. A novel layout style is introduced for stacked FET design at low mm-wave frequencies. A small multi-finger FET is laid out with fingers connected in series to create the stacked FET. The gate capacitors are realized around the FET with the back-end-of-line metal available in the CMOS process. Multiple multigate cells are interconnected to implement the stacked FET PA. A PA designed in this style in 45 nm CMOS SOI process achieved 24.8 dBm of output power and 29% PAE at 28 GHz with high reliability. This PA is very broadband and linear as shown by the modulated data measurements achieving a data rate of 36 Gbps (6 GS/s, 64 QAM) at 14 dBm with 9.3% PAE, with no digital predistortion. NFETs and PFETs available in nano-scale CMOS processes are compared and it is shown that in deeply scaled processes, PMOS devices are a viable alternative to NFETs due to their cut-off frequencies similar to those of NFETs, and higher breakdown voltages than NFETs. The first exclusively PMOS mm-wave PA design is reported. This 3-stack PA, made in 32 nm CMOS SOI process, achieved a maximum output power of 19.6 dBm and maximum efficiency of 24% at 78 GHz. All the designs reported in this thesis achieved either the highest output power or the highest PAE for a CMOS PA at their respective frequencies.

This book provides an overview of current efficiency enhancement and linearization techniques for silicon power amplifier designs. It examines the latest state of the art technologies and design techniques to address challenges for RF cellular mobile, base stations, and RF and mmW WLAN applications. Coverage includes material on current silicon (CMOS, SiGe) RF and mmW power amplifier designs, focusing on advantages and disadvantages compared with traditional GaAs implementations. With this book you will learn: The principles of linearization and efficiency improvement techniques The architectures allowing the optimum design of multimode Si RF and mmW power amplifiers How to make designs more efficient by employing new design techniques such as linearization and efficiency improvement Layout considerations Examples of schematic, layout, simulation and measurement results Addresses the problems of high power generation, faithful construction of non-constant envelope constellations, and efficient and well control power radiation from integrated silicon chips Demonstrates how silicon technology can solve problems and trade-offs of power amplifier design, including price, size, complexity and efficiency Written and edited by the top contributors to the field