Since the 90 nm CMOS technology node, geometric scaling of CMOS has been supplemented with strain to boost transistor drive current. Future CMOS technology nodes (i.e. beyond the 32 nm node) will require more significant changes to continue improvements in transistor performance. Novel CMOS channel materials and device architectures are one option for enhancing carrier transport and increasing device performance. In this work strained SiGe and Ge are examined as a means of increasing the drive current in deeply scaled CMOS. As part of this work a novel high mobility strained-Ge on-insulator substrate has been developed, and the hole transport characteristics of short channel and asymmetrically strained-SiGe channel p-MOSFETs have been explored. A thin-body biaxial compressive strained-Si/strained-Ge heterostructure on-insulator (HOI) substrate has been developed, which combines the electrostatic benefits of the thin-body architecture with the transport benefits of biaxial compressive strain. A novel Germanium on Silicon growth method and a low temperature bond and etch-back process have been developed to enable Ge HOI fabrication. P-MOSFETs were also fabricated using these substrates and the hole mobility characteristics were studied. The hole mobility and velocity characteristics of short channel biaxial compressive strained-Si 45 Geo. 55 p-MOSFETs on-insulator have also been examined. Devices with gate lengths down to 65 nm were fabricated. The short channel mobility characteristics were extracted and a 2.4x hole mobility enhancement relative to relaxed-Si was observed. The measured hole velocity enhancement is more modest at about 1.2x. Band structure and ballistic velocity simulations suggest that a more substantial velocity improvement can be expected with the incorporation of added longitudinal uniaxial compressive strain in the SiGe channel. The hole mobility characteristics of biaxial strained SiGe and Ge p-MOSFETs with applied uniaxial strain are also studied. The hole mobility in biaxial compressive strained SiGe is already enhanced relative to relaxed Si. It is observed that this mobility enhancement increases further with the application of 110 longitudinal uniaxial compressive strain. Since hole mobility and velocity are correlated through their dependence on the hole effective mass, a mass driven increase in mobility with applied uniaxial strain should result in an increase in velocity. Simulations have also been performed to estimate the hole effective mass change in asymmetric strained SiGe. Finally the piezo resistance coefficients of strained SiGe are extracted and found to be larger than in Si.

(Cont.) Comparisons between SSDOI of two strain levels indicate benefits of strain engineering down to 3 nm thickness. The hole mobility in HOI is improved compared to that in SSDOI, due to the high hole mobility in the Si1-zGez channel. The mobility enhancement is similar at low and high hole densities even at moderate strain levels. The hole mobility in HOI with SiGe channel thickness below 10 nm is observed to follow a similar dependence on channel thickness as hole mobility in SSDOI. Simulations of electrostatics in HOI and SSDOI with ultra-thin channel thicknesses indicate similarities in the confinement of the inversion charge in ultra-thin body HOI and SSDOI. This suggests that the similar reduction of hole mobility in HOI and SSDOI with 4-10 nm-thick channels is associated with an increase in phonon scattering from the reduced effective channel thickness.

The second International SiGe & Ge: Materials, Processing, and Devices Symposium was part of the 2006 ECS conference held in Cancun, Mexico from October 29-Nov 3, 2006. This meeting provided a forum for reviewing and discussing all materials and device related aspects of SiGe & Ge. The hardcover edition includes a bonus CD-ROM containing the PDF of the entire issue.

Nanostructured silicon-germanium (SiGe) opens up the prospects of novel and enhanced electronic device performance, especially for semiconductor devices. Silicon-germanium (SiGe) nanostructures reviews the materials science of nanostructures and their properties and applications in different electronic devices. The introductory part one covers the structural properties of SiGe nanostructures, with a further chapter discussing electronic band structures of SiGe alloys. Part two concentrates on the formation of SiGe nanostructures, with chapters on different methods of crystal growth such as molecular beam epitaxy and chemical vapour deposition. This part also includes chapters covering strain engineering and modelling. Part three covers the material properties of SiGe nanostructures, including chapters on such topics as strain-induced defects, transport properties and microcavities and quantum cascade laser structures. In Part four, devices utilising SiGe alloys are discussed. Chapters cover ultra large scale integrated applications, MOSFETs and the use of SiGe in different types of transistors and optical devices. With its distinguished editors and team of international contributors, Silicon-germanium (SiGe) nanostructures is a standard reference for researchers focusing on semiconductor devices and materials in industry and academia, particularly those interested in nanostructures. Reviews the materials science of nanostructures and their properties and applications in different electronic devices Assesses the structural properties of SiGe nanostructures, discussing electronic band structures of SiGe alloys Explores the formation of SiGe nanostructuresfeaturing different methods of crystal growth such as molecular beam epitaxy and chemical vapour deposition

(Cont.) Record mobility strained Si p-MOSFETs have been fabricated on relaxed 40% Ge virtual substrates. Hole mobility enhancements saturate at virtual substrate compositions of 40% Ge and above, with mobility enhancements over twice that of co-processed bulk Si devices. In contrast, hole mobility in strained Si p-MOSFETs displays no strong dependence on strained layer thickness. These results indicate that strain is the primary variable in determining hole mobility in strained Si p-MOSFETs and that symmetric electron and hole mobility enhancements in strained Si MOSFETs can be obtained for virtual substrate compositions beyond 35% Ge. The effect of alloy scattering on carrier mobility in tensile strained SiGe surface channel MOSFETs is measured directly for the first time. Electron mobility is degraded much more severely than hole mobility in these heterostructures, in agreement with theoretical predictions. Dual channel heterostructures, which consist of the combination of buried compressively strained SiilyGey buried channels and tensile strained Si surface channels, grown on relaxed SilxGex virtual substrates, are explored in detail for the first time. Hole mobilities exceeding 700 cm2/V-s have been achieved by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates. This layer sequence exhibits nearly symmetric electron and hole mobilities, both enhanced relative to bulk Si ...

(Cont.) While [epsilon]-Si p-MOSFETs tend to lose much of their mobility enhancement at large vertical fields, previous work shows that the situation improves as x in the Si[sub]l-x Ge[sub]x virtual substrate is increased to 0.5. The work presented here demonstrates that enhancements continue to improve for even higher Ge content. At x = 0.7, hole mobility enhancements of 2.9 times were observed with no degradation at very large inversion densities (i.e.>101̂3cm-̂2). Also, for the first time, a p-MOSFET with mobility enhancements that are independent of inversion density has been demonstrated through the use of a digital-alloy heterostructure. In general, it is shown that engineering the layer structure allows great control over the slope of hole mobility versus gate overdrive and that hole mobility enhancements that increase or remain constant with respect to inversion density can be attained. While the first demonstration of high hole mobility in strained Ge ([epsilon]-Ge) was published nearly 10 years ago, little or no work on enhancement mode p-MOSFETs utilizing [epsilon]-Ge had been published prior to this thesis ...

What seems routine today was not always so. The field of Si-based heterostructures rests solidly on the shoulders of materials scientists and crystal growers, those purveyors of the semiconductor “black arts” associated with the deposition of pristine films of nanoscale dimensionality onto enormous Si wafers with near infinite precision. We can now grow near-defect free, nanoscale films of Si and SiGe strained-layer epitaxy compatible with conventional high-volume silicon integrated circuit manufacturing. SiGe and Si Strained-Layer Epitaxy for Silicon Heterostructure Devices tells the materials side of the story and details the many advances in the Si-SiGe strained-layer epitaxy for device applications. Drawn from the comprehensive and well-reviewed Silicon Heterostructure Handbook, this volume defines and details the many advances in the Si/SiGe strained-layer epitaxy for device applications. Mining the talents of an international panel of experts, the book covers modern SiGe epitaxial growth techniques, epi defects and dopant diffusion in thin films, stability constraints, and electronic properties of SiGe, strained Si, and Si-C alloys. It includes appendices on topics such as the properties of Si and Ge, the generalized Moll-Ross relations, integral charge-control relations, and sample SiGe HBT compact model parameters.