Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges.

"Silicon photonic has provided an opportunity to enhance future processor speed by replacing copper interconnects with an on chip optical network. Although photonics are supposed to be efficient in terms of power consumption, speed, and bandwidth, the existing silicon photonic technologies involve problems limiting their efficiency. Examples of limitations to efficiency are transmission loss, coupling loss, modulation speed limited by electro-optical effect, large amount of energy required for thermal control of devices, and the bandwidth limit of existing optical routers. The objective of this dissertation is to investigate novel materials and methods to enhance the efficiency of silicon photonic devices. The first part of this dissertation covers the background, theory and design of on chip optical interconnects, specifically silicon photonic interconnects. The second part describes the work done to build a 300mm silicon photonic library, including its process flow, comprised of basic elements like electro-optical modulators, germanium detectors, Wavelength Division Multiplexing (WDM) interconnects, and a high efficiency grating coupler. The third part shows the works done to increase the efficiency of silicon photonic modulators, unitizing the X(3) nonlinear effect of silicon nanocrystals to make X(2) electro-optical modulators on silicon, and increasing the efficiency of thermal control by incorporating micro-oven structures in electro-optical modulators. The fourth part introduces work done on dynamic optical interconnects including a broadband optical router, single photon level adiabatic wavelength conversion, and optical signal delay. The final part summarizes the work and talks about future development."--Abstract.

In recent years, there has been a considerable amount of effort, both in industry and academia, focusing on the design, implementation, performance analysis, evaluation and prediction of silicon photonic interconnects for inter- and intra-chip communication, paving the way for the design and dimensioning of the next and future generation of high-performance computing systems. Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges. The majority of the chapters were collected from presentations made at the International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS) held over the past two years. The workshop invites internationally recognized speakers on the range of topics relevant to silicon photonics and computing systems. Technical topics discussed in the book include:Design and Implementation of Chip-Scale Photonic Interconnects;Developing Design Automation Solutions for Chip-Scale Photonic Interconnects;Design Space Exploration in Chip-Scale Photonic Interconnects;Thermal Analysis and Modeling in Photonic Interconnects;Design for Reliability;Fabrication Non-Uniformity in Photonic Interconnects;Photonic Interconnects for Computing Systems presents a compilation of outstanding contributions from leading research groups in the field. It presents a comprehensive overview of the design, advantages, challenges, and requirements of photonic interconnects for computing systems. The selected contributions present important discussions and approaches related to the design and development of novel photonic interconnect architectures, as well as various design solutions to improve the performance of such systems while considering different challenges. The book is ideal for personnel in computer/photonic industries as well as academic staff and master/graduate students in computer science and engineering, electronic engineering, electrical engineering and photonics.

Silicon photonics is beginning to play an important role in driving innovations in communication and computation for an increasing number of applications, from health care and biomedical sensors to autonomous driving, datacenter networking, and security. In recent years, there has been a significant amount of effort in industry and academia to innovate, design, develop, analyze, optimize, and fabricate systems employing silicon photonics, shaping the future of not only Datacom and telecom technology but also high-performance computing and emerging computing paradigms, such as optical computing and artificial intelligence. Different from existing books in this area, Silicon Photonics for High-Performance Computing and Beyond presents a comprehensive overview of the current state-of-the-art technology and research achievements in applying silicon photonics for communication and computation. It focuses on various design, development, and integration challenges, reviews the latest advances spanning materials, devices, circuits, systems, and applications. Technical topics discussed in the book include: • Requirements and the latest advances in high-performance computing systems • Device- and system-level challenges and latest improvements to deploy silicon photonics in computing systems • Novel design solutions and design automation techniques for silicon photonic integrated circuits • Novel materials, devices, and photonic integrated circuits on silicon • Emerging computing technologies and applications based on silicon photonics Silicon Photonics for High-Performance Computing and Beyond presents a compilation of 19 outstanding contributions from academic and industry pioneers in the field. The selected contributions present insightful discussions and innovative approaches to understand current and future bottlenecks in high-performance computing systems and traditional computing platforms, and the promise of silicon photonics to address those challenges. It is ideal for researchers and engineers working in the photonics, electrical, and computer engineering industries as well as academic researchers and graduate students (M.S. and Ph.D.) in computer science and engineering, electronic and electrical engineering, applied physics, photonics, and optics.

Dramatic increases in processing power have rapidly scaled on-chip aggregate bandwidths into the Tb/s range. This necessitates a corresponding increase in the amount of data communicated between chips, so as not to limit overall system performance. To meet the increasing demand for interchip communication bandwidth, researchers are investigating the use of high-speed optical interconnect architectures. Unlike their electrical counterparts, optical interconnects offer high bandwidth and negligible frequency-dependent loss, making possible per-channel data rates of more than 10 Gb/s. High-Speed Photonics Interconnects explores some of the groundbreaking technologies and applications that are based on photonics interconnects. From the Evolution of High-Speed I/O Circuits to the Latest in Photonics Interconnects Packaging and Lasers Featuring contributions by experts from academia and industry, the book brings together in one volume cutting-edge research on various aspects of high-speed photonics interconnects. Contributors delve into a wide range of technologies, from the evolution of high-speed input/output (I/O) circuits to recent trends in photonics interconnects packaging. The book discusses the challenges associated with scaling I/O data rates and current design techniques. It also describes the major high-speed components, channel properties, and performance metrics. The book exposes readers to a myriad of applications enabled by photonics interconnects technology. Learn about Optical Interconnect Technologies Suitable for High-Density Integration with CMOS Chips This richly illustrated work details how optical interchip communication links have the potential to fully leverage increased data rates provided through complementary metal-oxide semiconductor (CMOS) technology scaling at suitable power-efficiency levels. Keeping the mathematics to a minimum, it gives engineers, researchers, graduate students, and entrepreneurs a comprehensive overview of the dynamic landscape of high-speed photonics interconnects.

The market for higher data rate communication is driving the semiconductor industry to develop new techniques of writing at smaller scales, while continuing to scale bandwidth at low power consumption. The question arises of how to continue to sustain this trend. Silicon photonic (SiPh) devices offer a potential solution to the electronic interconnect bandwidth bottleneck. SiPh leverages the technology commensurate of decades of fabrication development with the unique functionality of next-generation optical interconnects. Finer fabrication techniques have allowed for manufacturing physical characteristics of waveguide structures that can support multiple modes in a single waveguide. By refining modal characteristics in photonic waveguide structures, through mode multiplexing with the asymmetric y-junction and microring resonator, higher aggregate data bandwidth is demonstrated via various combinations of spatial multiplexing, broadening applications supported by the integrated platform.

Large on-chip bandwidths required for high performance electronic chips will render optical components essential parts of future on-chip interconnects. Silicon photonics enables highly integrated photonic integrated circuit (PIC) using CMOS compatible process. In order to maximize the bandwidth density and design flexibility of PICs, vertical integration of electronic layers and photonics layers is strongly preferred. Comparing deposited silicon, single crystalline silicon offers low material absorption loss and high carrier mobility, which are ideal for multi-layer silicon PIC. Three different methods to build multi-layer silicon PICs based on single crystalline silicon are demonstrated in this dissertation, including double-bonded silicon-on-insulator (SOI) wafers, transfer printed silicon nanomembranes, and adhesively bonded silicon nanomembranes. 1-to-12 waveguide fanouts using multimode interference (MMI) couplers were designed, fabricated and characterized on both double-bonded SOI and transfer printed silicon nanomembrane, and the results show comparable performance to similar devices fabricated on SOI. However, both of these two methods have their limitations in optical interconnects applications. Large and defect-free silicon nanomembrane fabricated using adhesive bonding is identified as a promising solution to build multi-layer silicon PICs. A double-layer structure constituted of vertically integrated silicon nanomembranes was demonstrated. Subwavelength length based fiber-to-chip grating couplers were used to couple light into this new platform. Three basic building blocks of silicon photonics were designed, fabricated and characterized, including 1) inter-layer grating coupler based on subwavelength nanostructure, which has efficiency of 6.0 dB and 3 dB bandwidth of 41 nm, for light coupling between layers, 2) 1-to-32 H-tree optical distribution, which has excess loss of 2.2 dB, output uniformity of 0.72 dB and 3 dB bandwidth of 880 GHz, 3) waveguide crossing utilizing index-engineered MMI coupler, which has crossing loss of 0.019 dB, cross talk lower than -40 dB and wide transmission spectrum covering C-band and L-band. The demonstrated integration method and silicon photonic devices can be integrated into the CMOS back-end process for clock distribution and global signaling.