This book constitutes the refereed proceedings of the 8th International Workshop on Field-Programmable Logics and Applications, FPL '98, held in Tallinn, Estonia, in August/September 1998. The 39 revised full papers presented were carefully selected for inclusion in the book from a total of 86 submissions. Also included are 30 refereed high-quality posters. The papers are organized in topical sections on design methods, general aspects, prototyping and simulation, development methods, accelerators, system architectures, hardware/software codesign, system development, algorithms on FPGAs, and applications.

This book constitutes the refereed proceedings of the 8th International Workshop on Field-Programmable Logics and Applications, FPL '98, held in Tallinn, Estonia, in August/September 1998. The 39 revised full papers presented were carefully selected for inclusion in the book from a total of 86 submissions. Also included are 30 refereed high-quality posters. The papers are organized in topical sections on design methods, general aspects, prototyping and simulation, development methods, accelerators, system architectures, hardware/software codesign, system development, algorithms on FPGAs, and applications.

Synthesis Techniques and Optimization for Reconfigurable Systems discusses methods used to model reconfigurable applications at the system level, many of which could be incorporated directly into modern compilers. The book also discusses a framework for reconfigurable system synthesis, which bridges the gap between application-level compiler analysis and high-level device synthesis. The development of this framework (discussed in Chapter 5), and the creation of application analysis which further optimize its output (discussed in Chapters 7, 8, and 9), represent over four years of rigorous investigation within UCLA's Embedded and Reconfigurable Laboratory (ERLab) and UCSB's Extensible, Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group. The research of these systems has not yet matured, and we continually strive to develop data and methods, which will extend the collective understanding of reconfigurable system synthesis.

This book contains the papers presented at the 9th International Workshop on Field ProgrammableLogic and Applications (FPL’99), hosted by the University of Strathclyde in Glasgow, Scotland, August 30 – September 1, 1999. FPL’99 is the ninth in the series of annual FPL workshops. The FPL’99 programme committee has been fortunate to have received a large number of high-quality papers addressing a wide range of topics. From these, 33 papers have been selected for presentation at the workshop and a further 32 papers have been accepted for the poster sessions. A total of 65 papers from 20 countries are included in this volume. FPL is a subject area that attracts researchers from both electronic engine- ing and computer science. Whether we are engaged in research into soft ha- ware or hard software seems to be primarily a question of perspective. What is unquestionable is that the interaction of groups of researchers from di?erent backgrounds results in stimulating and productive research. As we prepare for the new millennium, the premier European forum for - searchers in ?eld programmable logic remains the FPL workshop. Next year the FPL series of workshopswill celebrate its tenth anniversary.The contribution of so many overseas researchers has been a particularly attractive feature of these events, giving them a truly international perspective, while the informal and convivial atmosphere that pervades the workshops have been their hallmark. We look forward to preserving these features in the future while continuing to expand the size and quality of the events.

This book constitutes the refereed proceedings of the 11th International Conference on Field-Programmable Logic and Application, FPL 2001, held in Belfast, Northern Ireland, UK, in August 2001. The 56 revised full papers and 15 short papers presented were carefully reviewed and selected from a total of 117 submissions. The book offers topical sections on architectural framework, place and route, architecture, DSP, synthesis, encryption, runtime reconfiguration, graphics and vision, networking, processor interaction, applications, methodology, loops and systolic, image processing, faults, and arithmetic.

This book constitutes the refereed proceedings of the 13th International Conference on Field-Programmable Logic and Applications, FPL 2003, held in Lisbon, Portugal in September 2003. The 90 revised full papers and 56 revised poster papers presented were carefully reviewed and selected from 216 submissions. The papers are organized in topical sections on technologies and trends, communications applications, high level design tools, reconfigurable architecture, cryptographic applications, multi-context FPGAs, low-power issues, run-time reconfiguration, compilation tools, asynchronous techniques, bio-related applications, codesign, reconfigurable fabrics, image processing applications, SAT techniques, application-specific architectures, DSP applications, dynamic reconfiguration, SoC architectures, emulation, cache design, arithmetic, bio-inspired design, SoC design, cellular applications, fault analysis, and network applications.