Biological signal sensing and processing has greatly improved our understanding about the body. With the increased number of high quality biosignals that can be sensed from the body, more efficient sensing and processing systems are detrimental to meet requirements of high bandwidth data measurement and processing in power and area limited settings. Power limitation is more and more stringent with the goal of making unobtrusive wearable/implantable devices, where the battery should be long-lasting (e.g., weeks) and as small as possible at the same time. A conventional wearable/implantable biological signal sensing system includes analog-front-end to measure a biosignal, analog-to-digital converter for conversion of the measured signal, and radio to transmit the digitized signal. The most power-hungry block among them is radio, where the power consumption increases with data bandwidth. To overcome the radio power domination, physiologically relevant information can be extracted on sensing system, which would significantly reduce the transferred data bandwidth. Notably, while achieving radio power savings, the accuracy of the on-chip processing should be high. To achieve ultra-low power and high accuracy on-chip processing in resource limiting settings, the dissertation presents two ways. The first path focuses on implementation of a high accuracy digital biological signal processing algorithm in the analog signal processing (ASP) domain. Presented ASP implementation of a high accuracy algorithm achieves high electrocardiogram (ECG) feature detection with the lowest power consumption reported. In the second path, a novel biosignal processing algorithm with physical roots is introduced for intracortical neural spike and ECG feature detection. Moreover, a physical implementation of the developed algorithm with physical computation elements is designed and validated against public and custom datasets. The algorithm with physical origins achieves better signal enhancement and feature detection than widely used ECG and intracortical neural signal enhancement algorithms. Additionally, its ultra-low power physical implementation offers real-time operation while not compromising accuracy. In the dissertation, first, algorithm-level discussions are presented, which are followed by circuit design discussions. Before going into details of algorithms, in Introduction, significance of real-time and accurate ultra-low power on-chip processing is emphasized.

Biomedical signal processing in the medical field has helped optimize patient care and diagnosis within medical facilities. As technology in this area continues to advance, it has become imperative to evaluate other ways these computation techniques could be implemented. Computational Tools and Techniques for Biomedical Signal Processing investigates high-performance computing techniques being utilized in hospital information systems. Featuring comprehensive coverage on various theoretical perspectives, best practices, and emergent research in the field, this book is ideally suited for computer scientists, information technologists, biomedical engineers, data-processing specialists, and medical physicists interested in signal processing within medical systems and facilities.

Advances in mobile electronics are fueling new possibilities in a variety of applications, one of which is ambulatory medical monitoring with body-worn or implanted sensors. Digital processors on such sensors serve to analyze signals in real-time and extract key features for transmission or storage. To support diverse and evolving applications, the processor should be flexible, and to extend sensor operating lifetime, the processor should be energy-efficient. This thesis focuses on architectures and circuits for low power biomedical signal processing. A general-purpose processor is extended with custom hardware accelerators to reduce the cycle count and energy for common tasks, including FIR and median filtering as well as computing FFTs and mathematical functions. Improvements to classic architectures are proposed to reduce power and improve versatility: an FFT accelerator demonstrates a new control scheme to reduce datapath switching activity, and a modified CORDIC engine features increased input range and decreased quantization error over conventional designs. At the system level, the addition of accelerators increases leakage power and bus loading; strategies to mitigate these costs are analyzed in this thesis. A key strategy for improving energy efficiency is to aggressively scale the power supply voltage according to application performance demands. However, increased sensitivity to variation at low voltages must be mitigated in logic and SRAM design. For logic circuits, a design flow and a hold time verification methodology addressing local variation are proposed and demonstrated in a 65nm microcontroller functioning at 0.3V. For SRAMs, a model for the weak-cell read current is presented for near-V supply voltages, and a self-timed scheme for reducing internal bus glitches is employed with low leakage overhead. The above techniques are demonstrated in a 0.5-1. OV biomedical signal processing platform in 0.13p-Lm CMOS. The use of accelerators for key signal processing enabled greater than 10x energy reduction in two complete EEG and EKG analysis applications, as compared to implementations on a conventional processor.

Aging population and the thereby ever-rising cost of health services call for novel and innovative solutions for providing medical care and services. So far, medical care is primarily provided in the form of time-consuming in-person appointments with trained personnel and expensive, stationary instrumentation equipment. As for many current and past challenges, the advances in microelectronics are a crucial enabler and offer a plethora of opportunities. With key building blocks such as sensing, processing, and communication systems and circuits getting smaller, cheaper, and more energy-efficient, personal and wearable or even implantable point-of-care devices with medicalgrade instrumentation capabilities become feasible. Device size and battery lifetime are paramount for the realization of such devices. Besides integrating the required functionality into as few individual microelectronic components as possible, the energy efficiency of such is crucial to reduce battery size, usually being the dominant contributor to overall device size. In this thesis, we present two major contributions to achieve the discussed goals in the context of miniaturized medical instrumentation: First, we present a synchronization solution for embedded, parallel near-threshold computing (NTC), a promising concept for enabling the required processing capabilities with an energy efficiency that is suitable for highly mobile devices with very limited battery capacity. Our proposed solution aims at increasing energy efficiency and performance for parallel NTC clusters by maximizing the effective utilization of the available cores under parallel workloads. We describe a hardware unit that enables fine-grain parallelization by greatly optimizing and accelerating core-to-core synchronization and communication and analyze the impact of those mechanisms on the overall performance and energy efficiency of an eight-core cluster. With a range of digital signal processing (DSP) applications typical for the targeted systems, the proposed hardware unit improves performance by up to 92% and 23% on average and energy efficiency by up to 98% and 39% on average. In the second part, we present a MCU processing and control subsystem (MPCS) for the integration into VivoSoC, a highly versatile single-chip solution for mobile medical instrumentation. In addition to the MPCS, it includes a multitude of analog front-ends (AFEs) and a multi-channel power management IC (PMIC) for voltage conversion. ...

This book presents an interdisciplinary paradigms of computational intelligence techniques and biomedical signal processing. The computational intelligence techniques outlined in the book will help to develop various ways to enhance and utilize signal processing algorithms in the field of biomedical signal processing. In this book, authors have discussed research, discoveries and innovations in computational intelligence, signal processing, and biomedical engineering that will be beneficial to engineers working in the field of health care systems. The book provides fundamental and initial level theory and implementation tools, so that readers can quickly start their research in these interdisciplinary domains.

This book provides an interdisciplinary look at emerging trends in signal processing and biomedicine found at the intersection of healthcare, engineering, and computer science. It examines the vital role signal processing plays in enabling a new generation of technology based on big data, and looks at applications ranging from medical electronics to data mining of electronic medical records. Topics covered include analysis of medical images, machine learning, biomedical nanosensors, wireless technologies, and instrumentation and electrical stimulation. Biomedical Signal Processing: Innovation and Applications presents tutorials and examples of successful applications, and will appeal to a wide range of professionals, researchers, and students interested in applications of signal processing, medicine, and biology.

Often WT systems employ the discrete wavelet transform, implemented on a digital signal processor. However, in ultra low-power applications such as biomedical implantable devices, it is not suitable to implement the WT by means of digital circuitry due to the relatively high power consumption associated with the required A/D converter. Low-power analog realization of the wavelet transform enables its application in vivo, e.g. in pacemakers, where the wavelet transform provides a means to extremely reliable cardiac signal detection. In Ultra Low-Power Biomedical Signal Processing we present a novel method for implementing signal processing based on WT in an analog way. The methodology presented focuses on the development of ultra low-power analog integrated circuits that implement the required signal processing, taking into account the limitations imposed by an implantable device.