Digital signal processing (DSP) is used in a wide range of applications such as speech, telephone, mobile radio, video, radar and sonar. The sample rate requirements of these applications range from 10 KHz to 100 MHz. Real time implementation of these systems requires design of hardware which can process signal samples as these are received from the source, as opposed to storing them in buffers and processing them in batch mode. Efficient implementation of real time hardware for DSP applications requires study of families of architectures and implementation styles out of which an appropriate architecture can be selected for a specified application. To this end, the digit-serial implementation style is proposed as an appropriate design methodology for cases where bit-serial systems cannot meet the sample rate requirements, and bit-parallel systems require excessive hardware. The number of bits processed in a clock cycle is referred to as the digit-size. The hardware complexity and the achievable sample rate increase with increase in the digit-size. As special cases, a digit serial system is reduced to bit-serial or bit-parallel when the digit-size is selected to equal one or the word-length, respectively. A family of implementations can be obtained by changing the digit-size parameter, thus permitting an optimal trade-off between throughput and size. Because of their structured architecture, digit-serial designs lend themselves to automatic compilation from algorithmic descriptions. An implementation of this design methodology, the Parsifal silicon compiler was developed at the General Electric Corporate Research and Development laboratory.

This book highlights the many ideas and algorithms that Peter L. Montgomery has contributed to computational number theory and cryptography.

The natural mission of Computational Science is to tackle all sorts of human problems and to work out intelligent automata aimed at alleviating the b- den of working out suitable tools for solving complex problems. For this reason ComputationalScience,thoughoriginatingfromtheneedtosolvethemostch- lenging problems in science and engineering (computational science is the key player in the ?ght to gain fundamental advances in astronomy, biology, che- stry, environmental science, physics and several other scienti?c and engineering disciplines) is increasingly turning its attention to all ?elds of human activity. In all activities, in fact, intensive computation, information handling, kn- ledge synthesis, the use of ad-hoc devices, etc. increasingly need to be exploited and coordinated regardless of the location of both the users and the (various and heterogeneous) computing platforms. As a result the key to understanding the explosive growth of this discipline lies in two adjectives that more and more appropriately refer to Computational Science and its applications: interoperable and ubiquitous. Numerous examples of ubiquitous and interoperable tools and applicationsaregiveninthepresentfourLNCSvolumescontainingthecontri- tions delivered at the 2004 International Conference on Computational Science and its Applications (ICCSA 2004) held in Assisi, Italy, May 14–17, 2004.

This book constitutes the refereed proceedings of the 12th International Conference on Field-Programmable Logic and Applications, FPL 2002, held in Montpellier, France, in September 2002. The 104 revised regular papers and 27 poster papers presented together with three invited contributions were carefully reviewed and selected from 214 submissions. The papers are organized in topical sections on rapid prototyping, FPGA synthesis, custom computing engines, DSP applications, reconfigurable fabrics, dynamic reconfiguration, routing and placement, power estimation, synthesis issues, communication applications, new technologies, reconfigurable architectures, multimedia applications, FPGA-based arithmetic, reconfigurable processors, testing and fault-tolerance, crypto applications, multitasking, compilation techniques, etc.

Addresses a wide selection of multimedia applications, programmable and custom architectures for the implementations of multimedia systems, and arithmetic architectures and design methodologies. The book covers recent applications of digital signal processing algorithms in multimedia, presents high-speed and low-priority binary and finite field arithmetic architectures, details VHDL-based implementation approaches, and more.

This book constitutes the refereed proceedings of the 8th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2012, held in Hongkong, China, in March 2012. The 35 revised papers presented, consisting of 25 full papers and 10 poster papers were carefully reviewed and selected from 44 submissions. The topics covered are applied RC design methods and tools, applied RC architectures, applied RC applications and critical issues in applied RC.

This book constitutes the thoroughly refereed post-proceedings of the Second International Workshop on Reconfigurable Computing, ARC 2006, held in Delft, The Netherlands, in March 2006. The 22 revised full papers and 35 revised short papers presented were thoroughly reviewed and selected from 95 submissions. The papers are organized in topical sections on applications, power, image processing, organization and architecture, networks and communication, security, and tools.