This work presents a comprehensive modeling strategy for advanced large-size AlGaN/GaN HEMTs. A 22-element equivalent circuit with 12 extrinsic elements, including 6 capacitances, serves as small-signal model and as basis for a large-signal model. ANalysis of such capacitances leads to original equations, employed to form capacitance ratios. BAsic assumptions of existing parameter extractions for 22-element equivalent circuits are perfected: A) Required capacitance ratios are evaluated with device's top-view images. B) Influences of field plates and source air-bridges on these ratios are considered. The large-signal model contains a gate charge's non-quasi-static model and a dispersive-IDS model. THe extrinsic-to-intrinsic voltage transformation needed to calculate non-quasi-static parameters from small-signal parameters is improved with a new description for the measurement's boundary bias points. ALl IDS-model parameters, including time constants of charge-trapping and self-heating, are extracted using pulsed-DC IV and IDS-transient measurements, highlighting the modeling strategy's empirical character.

All model parameters are fundamentally coupled together, so that directly measured individual parameters, although widely used and accepted, may initially only serve as good estimates. This comprehensive resource presents all aspects concerning the modeling of semiconductor field-effect device parameters based on gallium-arsenide (GaAs) and gallium nitride (GaN) technology. Metal-semiconductor field-effect transistors (MESFETs), high electron mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs), their structures and functions, and existing transistor models are also classified. The Shockley model is presented in order to give insight into semiconductor field-effect transistor (FET) device physics and explain the relationship between geometric and material parameters and device performance. Extraction of trapping and thermal time constants is discussed. A special section is devoted to standard nonlinear FET models applied to large-signal measurements, including static-/pulsed-DC and single-/two-tone stimulation. High power measurement setups for signal waveform measurement, wideband source-/load-pull measurement (including envelope source-/load pull) are also included, along with high-power intermodulation distortion (IMD) measurement setup (including envelope load-pull). Written by a world-renowned expert in the field, this book is the first to cover of all aspects of semiconductor FET device modeling in a single volume.

Nowadays, the microelectronics technology is based on the mature and very well established silicon (Si) technology. However, Si exhibits some important limitations regarding its voltage blocking capability, operation temperature and switching frequency. In this sense, Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) devices have the potential to make this change possible. The unique combination of the high-breakdown field, the high-channel electron mobility of the two dimensional electron gas (2DEG), and high-temperature of operation has attracted enormous interest from social, academia and industry and in this context this PhD dissertation has been made. This thesis has focused on improving the device performance through the advanced design, fabrication and characterization of AlGaN/GaN HEMTs, primarily grown on Si templates. The first milestone of this PhD dissertation has been the establishment of a know-how on GaN HEMT technology from several points of view: the device design, the device modeling, the process fabrication and the advanced characterization primarily using devices fabricated at Centre de Recherche sur l'Hétéro-Epitaxie (CRHEA-CNRS) (France) in the framework of a collaborative project. In this project, the main workhorse of this dissertation was the explorative analysis performed on the AlGaN/GaN HEMTs by innovative electrical and physical characterization methods. A relevant objective of this thesis was also to merge the nanotechnology approach with the conventional characterization techniques at the device scale to understand the device performance. A number of physical characterization techniques have been imaginatively used during this PhD determine the main physical parameters of our devices such as the morphology, the composition, the threading dislocations density, the nanoscale conductive pattern and others. The conductive atomic force microscopy (CAFM) tool have been widely described and used to understand the conduction mechanisms through the AlGaN/GaN Ohmic contact by performing simultaneously topography and electrical conductivity measurements. As it occurs with the most of the electronic switches, the gate stack is maybe the critical part of the device in terms of performance and longtime reliability. For this reason, how the AlGaN/GaN HEMT gate contact affects the overall HEMT behaviour by means of advanced characterization and modeling has been intensively investigated. It is worth mentioning that the high-temperature characterization is also a cornerstone of this PhD. It has been reported the elevated temperature impact on the forward and the reverse leakage currents for analogous Schottky gate HEMTs grown on different substrates: Si, sapphire and free-standing GaN (FS-GaN). The HEMT' forward-current temperature coefficients (T̂a) as well as the thermal activation energies have been determined in the range of 25-300 oC. Besides, the impact of the elevated temperature on the Ohmic and gate contacts has also been investigated. The main results of the gold-free AlGaN/GaN HEMTs high-voltage devices fabricated with a 4 inch Si CMOS compatible technology at the clean room of the CNM in the framework of the industrial contract with ON semiconductor were presented. We have shown that the fabricated devices are in the state-of-the-art (gold-free Ohmic and Schottky contacts) taking into account their power device figure-of-merit ((VB̂2)/Ron) of 4.05×10̂8 W/cm̂2. Basically, two different families of AlGaN/GaN-on-Si MIS-HEMTs devices were fabricated on commercial 4 inch wafers: (i) using a thin ALD HfO2 (deposited on the CNM clean room) and (ii) thin in-situ grown Si3N4, as a gate insulator (grown by the vendor). The scientific impact of this PhD in terms of science indicators is of 17 journal papers (8 as first author) and 10 contributions at international conferences.

Gallium nitride (GaN)-based High Electron Mobility Transistors (HEMTs) for high voltage, high power switching and regulating for space applications are studied in this work. Efficient power switching is associated with operation in high OFF-state blocking voltage while keeping the ON-state resistance, the dynamic dispersion and leakage currents as low as possible. The potential of such devices to operate at high voltages is limited by a chain of factors such as subthreshold leakages and the device geometry. Blocking voltage enhancement is a complicated problem that requires parallel methods for solution; epitaxial layers design, device structural and geometry design, and suitable semiconductor manufacturing technique. In this work physical-based device simulation as an engineering tool was developed. An overview on GaN-based HEMTs physical based device simulation using Silvaco-“ATLAS” is given. The simulation is utilized to analyze, give insight to the modes of operation of the device and for design and evaluation of innovative concepts. Physical-based models that describe the properties of the semiconductor material are introduced. A detailed description of the specific AlGaN/GaN HEMT structure definition and geometries are given along with the complex fine meshing requirements. Nitride-semiconductor specific material properties and their physical models are reviewed focusing on the energetic band structure, epitaxial strain tensor calculation in wurtzite materials and build-in polarization models. Special attention for thermal conductivity, carriers’ mobility and Schottky-gate-reverse-bias-tunneling is paid. Empirical parameters matching and adjustment of models parameters to match the experimental device measured results are discussed. An enhancement of breakdown voltage in AlxGa1-xN/GaN HEMT devices by increasing the electron confinement in the transistor channel using a low Al content AlyGa1-yN back-barrier layer structure is systematically studied. It is shown that the reduced sub-threshold drain-leakage current through the buffer layer postpones the punch-through and therefore shifts the breakdown of the device to higher voltages. It is also shown that the punch-through voltage (VPT) scales up with the device dimensions (gate to drain separation). An optimized electron confinement results both, in a scaling of breakdown voltage with device geometry and a significantly reduced sub-threshold drain and gate leakage currents. These beneficial properties are pronounced even further if gate recess technology is applied for device fabrication. For the systematic study a large variations of back-barrier epitaxial structures were grown on sapphire, n-type 4H-SiC and semi-insulating 4H-SiC substrates. The devices with 5 μm gate-drain separation grown on n-SiC owning Al0.05Ga0.95N and Al0.10Ga0.90N back-barrier exhibit 304 V and 0.43 m × cm2 and 342 V and 0.41 m × cm2 respectively. To investigate the impact of AlyGa1-yN back-barrier on the device properties the devices were characterized in DC along with microwave mode and robustness DC-step-stress test. Physical-based device simulations give insight in the respective electronic mechanisms and to the punch-through process that leads to device breakdown. Systematic study of GaN-based HEMT devices with insulating carbon-doped GaN back-barrier for high voltage operation is also presented. Suppression of the OFF-state sub-threshold drain leakage-currents enables breakdown voltage enhancement over 1000 V with low ON-state resistance. The devices with 5 μm gate-drain separation on SI-SiC and 7 μm gate-drain separation on n-SiC exhibit 938 V and 0.39 m × cm2 and 942 V and 0.39 m × cm2 respectively. Power device figure of merit of ~2.3 × 109 V2/-cm2 was calculated for these devices. The impacts of variations of carbon doping concentration, GaN channel thickness and substrates are evaluated. Trade-off considerations in ON-state resistance and of current collapse are addressed. A novel GaN-based HEMTs with innovative planar Multiple-Grating-Field-Plates (MGFPs) for high voltage operation are described. A synergy effect with additional electron channel confinement by using a heterojunction AlGaN back-barrier is demonstrated. Suppression of the OFF-state sub-threshold gate and drain leakage-currents enables breakdown voltage enhancement over 700 V and low ON-state resistance of 0.68 m × cm2. Such devices have a minor trade-off in ON-state resistance, lag factor, maximum oscillation frequency and cut-off frequency. Systematic study of the MGFP design and the effect of Al composition in the back-barrier are described. Physics-based device simulation results give insight into electric field distribution and charge carrier concentration depending on field-plate design. The GaN superior material breakdown strength properties are not always a guarantee for high voltage devices. In addition to superior epitaxial growth design and optimization for high voltage operation the device geometrical layout design and the device manufacturing process design and parameters optimization are important criteria for breakdown voltage enhancement. Smart layout prevent immature breakdown due to lateral proximity of highly biased interconnects. Optimization of inter device isolation designed for high voltage prevents substantial subthreshold leakage. An example for high voltage test device layout design and an example for critical inter-device insulation manufacturing process optimization are presented. While major efforts are being made to improve the forward blocking performance, devices with reverse blocking capability are also desired in a number of applications. A novel GaN-based HEMT with reverse blocking capability for Class-S switch-mode amplifiers is introduced. The high voltage protection is achieved by introducing an integrated recessed Schottky contact as a drain electrode. Results from our Schottky-drain HEMT demonstrate an excellent reverse blocking with minor trade-off in the ON-state resistance for the complete device. The excellent quality of the forward diode characteristics indicates high robustness of the recess process. The reverse blocking capability of the diode is better than –110 V. Physical-based device simulations give insight in the respective electronic mechanisms. Zusammenfassung In dieser Arbeit wurden Galliumnitrid (GaN)-basierte Hochspannungs-HEMTs (High Electron Mobility Transistor) für Hochleistungsschalt- und Regelanwendungen in der Raumfahrt untersucht. Effizientes Leistungsschalten erfordert einen Betrieb bei hohen Sperrspannungen gepaart mit niedrigem Einschaltwiderstand, geringer dynamischer Dispersion und minimalen Leckströmen. Dabei wird das aus dem Halbleitermaterial herrührende Potential für extrem spannungsfeste Transistoren aufgrund mehrerer Faktoren aus dem lateralen und dem vertikalen Bauelementedesign oft nicht erreicht. Physikalisch-basierte Simulationswerkzeuge für die Bauelemente wurden daher entwickelt. Die damit durchgeführte Analyse der unterschiedlichen Transistorbetriebszustände ermöglichte das Entwickeln innovativer Bauelementdesignkonzepte. Das Erhöhen der Bauelementsperrspannung erfordert parallele und ineinandergreifende Lösungsansätze für die Epitaxieschichten, das strukturelle und das geometrische Design und für die Prozessierungstechnologie. Neuartige Bauelementstrukturen mit einer rückseitigen Kanalbarriere (back-barrier) aus AlGaN oder Kohlenstoff-dotierem GaN in Kombination mit neuartigen geometrischen Strukturen wie den Mehrfachgitterfeldplatten (MGFP, Multiple-Grating-Field-Plate) wurden untersucht. Die elektrische Gleichspannungscharakterisierung zeigte dabei eine signifikante Verringerung der Leckströme im gesperrten Zustand. Dies resultierte bei nach wie vor sehr kleinem Einschaltwiderstand in einer Durchbruchspannungserhöhung um das etwa Zehnfache auf über 1000 V. Vorzeitige Spannungsüberschläge aufgrund von Feldstärkenspitzen an Verbindungsmetallisierungen werden durch ein geschickt gestaltetes Bauelementlayout verhindert. Eine Optimierung der Halbleiterisolierung zwischen den aktiven Strukturen führte auch im kV-Bereich zu vernachlässigbaren Leckströme. Während das Hauptaugenmerk der Arbeit auf der Erhöhung der Spannungsfestigkeit im Vorwärtsbetrieb des Transistors lag, ist für einige Anwendung auch ein rückwärtiges Sperren erwünscht. Für Schaltverstärker im S-Klassenbetrieb wurde ein neuartiger GaN-HEMT entwickelt, dessen rückwärtiges Sperrverhalten durch einen tiefgelegten Schottkykontakt als Drainelektrode hervorgerufen wird. Eine derartige Struktur ergab eine rückwärtige Spannungsfestigkeit von über 110 V.