This book presents techniques for energy reduction in adaptive embedded multimedia systems, based on dynamically reconfigurable processors. The approach described will enable designers to meet performance/area constraints, while minimizing video quality degradation, under various, run-time scenarios. Emphasis is placed on implementing power/energy reduction at various abstraction levels. To enable this, novel techniques for adaptive energy management at both processor architecture and application architecture levels are presented, such that both hardware and software adapt together, minimizing overall energy consumption under unpredictable, design-/compile-time scenarios.

This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors’ combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.

This book provides its readers with the means to implement energy-efficient video systems, by using different optimization approaches at multiple abstraction levels. The authors evaluate the complete video system with a motive to optimize its different software and hardware components in synergy, increase the throughput-per-watt, and address reliability issues. Subsequently, this book provides algorithmic and architectural enhancements, best practices and deployment models for new video systems, while considering new implementation paradigms of hardware accelerators, parallelism for heterogeneous multi- and many-core systems, and systems with long life-cycles. Particular emphasis is given to the current video encoding industry standard H.264/AVC, and one of the latest video encoders (High Efficiency Video Coding, HEVC).

This textbook is intended to give an introduction to and an overview of sta- of-the-art techniques in the design of complex embedded systems. The book title is SAMOS for two major reasons. First, it tries to focus on the actual distinct, yet important problem ?elds of System-Level design of embedded systems, including mapping techniques and synthesis,Architectural design,Modeling issues such as speci?cation languages, formal models, and- nallySimulation. The second reason is that the volume includes a number of papers presented at a workshop with the same name on the Island of Samos, Greece, in July 2001. In order to receive international attention, a number of reputed researchers were invited to this workshop to present their current work. Participation was by invitation only. For the volume presented here, a number of additional papers where selected based on a call for papers. All contributions were refereed. This volume presents a selection of 18 of the refereed papers, including 2 invited papers. The textbook is organized according to four topics: The ?rst isA)System- LevelDesignandSimulation.Inthissection,wepresentacollectionofpapers that give an overview of the challenging goal to design and explore alternatives of embedded system implementations at the system-level. One paper gives an overview of models and tools used in system-level design. The other papers present new models to describe applications, provide models for re?nement and design space exploration, and for tradeo? analysis between cost and ?exibility of an implementation.

Opening with a detailed review of existing techniques for selective encryption, this text then examines algorithms that combine both encryption and compression. The book also presents a selection of specific examples of the design and implementation of secure embedded multimedia systems. Features: reviews the historical developments and latest techniques in multimedia compression and encryption; discusses an approach to reduce the computational cost of multimedia encryption, while preserving the properties of compressed video; introduces a polymorphic wavelet architecture that can make dynamic resource allocation decisions according to the application requirements; proposes a light-weight multimedia encryption strategy based on a modified discrete wavelet transform; describes a reconfigurable hardware implementation of a chaotic filter bank scheme with enhanced security features; presents an encryption scheme for image and video data based on chaotic arithmetic coding.

This book constitutes the refereed proceedings of the 4th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2004, held in Samos, Greece on July 2004. Besides the SAMOS 2004 proceedings, the book also presents 19 revised papers from the predecessor workshop SAMOS 2003. The 55 revised full papers presented were carefully reviewed and selected for inclusion in the book. The papers are organized in topical sections on reconfigurable computing, architectures and implementation, and systems modeling and simulation.

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.