This book focuses on two of the most relevant problems related to power management on multicore and manycore systems. Specifically, one part of the book focuses on maximizing/optimizing computational performance under power or thermal constraints, while another part focuses on minimizing energy consumption under performance (or real-time) constraints.

This book constitutes the refereed proceedings of the 16th European Workshop on Computer Performance Engineering, EPEW 2019, held in Milan, Italy, in November 2019. The 10 papers presented in this volume together with one invited talk were carefully reviewed and selected from 13 submissions. The papers presented at the workshop reflect the diversity of modern performance engineering, with topics ranging from modeling and analysis of network/control protocols and high performance/BigData information systems, analysis of scheduling, blockchain technology, analytical modeling and simulation of computer/network systems.

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints. Dynamic Power Management: Design Techniques and CAD Tools addresses design techniques and computer-aided design solutions for power management. Different approaches are presented and organized in an order related to their applicability to control-units, macro-blocks, digital circuits and electronic systems, respectively. All approaches are based on the principle of exploiting idleness of circuits, systems, or portions thereof. They involve both the detection of idleness conditions and the freezing of power-consuming activities in the idle components. The book also describes some approaches to system-level power management, including Microsoft's OnNow architecture and the `Advanced Configuration and Power Management' standard proposed by Intel, Microsoft and Toshiba. These approaches migrate power management to the software layer running on hardware platforms, thus providing a flexible and self-configurable solution to adapting the power/performance tradeoff to the needs of mobile (and fixed) computing and communication. Dynamic Power Management: Design Techniques and CAD Tools is of interest to researchers and developers of computer-aided design tools for integrated circuits and systems, as well as to system designers.

The need for advanced thermal management materials in electronic packaging has been widely recognized as thermal challenges become barriers to the electronic industry’s ability to provide continued improvements in device and system performance. With increased performance requirements for smaller, more capable, and more efficient electronic power devices, systems ranging from active electronically scanned radar arrays to web servers all require components that can dissipate heat efficiently. This requires that the materials have high capability of dissipating heat and maintaining compatibility with the die and electronic packaging. In response to critical needs, there have been revolutionary advances in thermal management materials and technologies for active and passive cooling that promise integrable and cost-effective thermal management solutions. This book meets the need for a comprehensive approach to advanced thermal management in electronic packaging, with coverage of the fundamentals of heat transfer, component design guidelines, materials selection and assessment, air, liquid, and thermoelectric cooling, characterization techniques and methodology, processing and manufacturing technology, balance between cost and performance, and application niches. The final chapter presents a roadmap and future perspective on developments in advanced thermal management materials for electronic packaging.

This IBM® RedpaperTM publication describes the adapter-based virtualization capabilities that are being deployed in high-end IBM POWER7+TM processor-based servers. Peripheral Component Interconnect Express (PCIe) single root I/O virtualization (SR-IOV) is a virtualization technology on IBM Power Systems servers. SR-IOV allows multiple logical partitions (LPARs) to share a PCIe adapter with little or no run time involvement of a hypervisor or other virtualization intermediary. SR-IOV does not replace the existing virtualization capabilities that are offered as part of the IBM PowerVM® offerings. Rather, SR-IOV compliments them with additional capabilities. This paper describes many aspects of the SR-IOV technology, including: A comparison of SR-IOV with standard virtualization technology Overall benefits of SR-IOV Architectural overview of SR-IOV Planning requirements SR-IOV deployment models that use standard I/O virtualization Configuring the adapter for dedicated or shared modes Tips for maintaining and troubleshooting your system Scenarios for configuring your system This paper is directed to clients, IBM Business Partners, and system administrators who are involved with planning, deploying, configuring, and maintaining key virtualization technologies.

Computing has moved away from a focus on performance-centric serial computation, instead towards energy-efficient parallel computation. This provides continued performance increases without increasing clock frequencies, and overcomes the thermal and power limitations of the dark-silicon era. As the number of parallel cores increases, we transition into the many-core computing era. There is considerable interest in developing methods, tools, architectures and applications to support many-core computing.

In a previous volume (ICT-Energy-Concepts Towards Zero-Power ICT; referenced below as Vol. 1), we addressed some of the fundamentals related to bridging the gap between the amount of energy required to operate portable/mobile ICT systems and the amount of energy available from ambient sources. The only viable solution appears to be to attack the gap from both sides, i.e. to reduce the amount of energy dissipated during computation and to improve the efficiency in energy-harvesting technologies. In this book, we build on those concepts and continue the discussion on energy efficiency and sustainability by addressing the minimisation of energy consumption at different levels across the ICT system stack, from hardware to software, as well as discussing energy consumption issues in high-performance computing (HPC), data centres and communication in sensor networks. This book was realised thanks to the contribution of the project ‘Coordinating Research Efforts of the ICT-Energy Community’ funded from the European Union under the Future and Emerging Technologies (FET) area of the Seventh Framework Programme for Research and Technological Development (grant agreement n. 611004).