The recent technological advancements and market trends are causing an interesting phenomenon towards the convergence of the high-performance and the embedded computing domains. Critical real-time embedded systems are increasingly concerned with providing higher performance to implement advanced functionalities in a predictable way. OpenMP, the de-facto parallel programming model for shared memory architectures in the high-performance computing domain, is gaining the attention to be used in embedded platforms. The reason is that OpenMP is a mature language that allows to efficiently exploit the huge computational capabilities of parallel embedded architectures. Moreover, OpenMP allows to express parallelism on top of the current technologies used in embedded designs (e.g., C/C++ applications). At a lower level, OpenMP provides a powerful task-centric model that allows to define very sophisticated types of regular and irregular parallelism. While OpenMP provides relevant features for embedded systems, both the programming interface and the execution model are completely agnostic to the timing requirements of real-time systems. This thesis evaluates the use of OpenMP to develop future critical real-time embedded systems. The first contribution analyzes the OpenMP specification from a timing perspective. It proposes new features to be incorporated in the OpenMP standard and a set of guidelines to implement critical real-time systems with OpenMP. The second contribution develops new methods to analyze and predict the timing behavior of parallel applications, so that the notion of parallelism can be safely incorporated into critical real-time systems. Finally, the proposed techniques are evaluated with both synthetic applications and real use cases parallelized with OpenMP. With the above contributions, this thesis pushes the limits of the use of task-based parallel programming models in general, and OpenMP in particular, in critical real-time embedded domains.

This book introduces the advantages of parallel processing and details how to use it to deal with common signal processing and control algorithms. The text includes examples and end-of-chapter exercises, and case studies to put theoretical concepts into a practical context.

This book introduces the advantages of parallel processing and details how to use it to deal with common signal processing and control algorithms. The text includes examples and end-of-chapter exercises, and case studies to put theoretical concepts into a practical context.

A complete source of information on almost all aspects of parallel computing from introduction, to architectures, to programming paradigms, to algorithms, to programming standards. It covers traditional Computer Science algorithms, scientific computing algorithms and data intensive algorithms.

The use of fault-tolerant, real-time systems for the control of life- critical processes is becoming increasingly common, with examples including flight and nuclear reactor control systems. In such systems, the overhead associated with managing redundancy, communication, and task scheduling is critical due to real-time constraints imposed by the application; missed time deadlines can be viewed as system failures, with results as consequential as hardware failures. The Fault-Tolerant Parallel Processor (FTPP) was developed by Draper Laboratory as a fault-tolerant, real-time computing platform. This thesis analyzes the FTPP prototype operating system overhead through the use of empirical performance measurement and two performance models based on these measurements. One model is developed to predict the operating system overhead under various configurations and workloads; accurate prediction of overhead provides confidence that real-time constraints can be satisfied. Because the system communication overhead may vary depending upon the amount of contention by Processing Elements for service by the Network Element, a second model is developed to account for performance delays that may result from this contention. When such performance analysis and modeling are an integral part of a concurrent build-analyze-improve methodology, performance bottlenecks can be cost effectively removed at an early stage in development.

This volume contains the proceedings from the workshops held in conjunction with the IEEE International Parallel and Distributed Processing Symposium, IPDPS 2000, on 1-5 May 2000 in Cancun, Mexico. The workshopsprovidea forum for bringing together researchers,practiti- ers, and designers from various backgrounds to discuss the state of the art in parallelism.Theyfocusondi erentaspectsofparallelism,fromruntimesystems to formal methods, from optics to irregular problems, from biology to networks of personal computers, from embedded systems to programming environments; the following workshops are represented in this volume: { Workshop on Personal Computer Based Networks of Workstations { Workshop on Advances in Parallel and Distributed Computational Models { Workshop on Par. and Dist. Comp. in Image, Video, and Multimedia { Workshop on High-Level Parallel Prog. Models and Supportive Env. { Workshop on High Performance Data Mining { Workshop on Solving Irregularly Structured Problems in Parallel { Workshop on Java for Parallel and Distributed Computing { WorkshoponBiologicallyInspiredSolutionsto ParallelProcessingProblems { Workshop on Parallel and Distributed Real-Time Systems { Workshop on Embedded HPC Systems and Applications { Recon gurable Architectures Workshop { Workshop on Formal Methods for Parallel Programming { Workshop on Optics and Computer Science { Workshop on Run-Time Systems for Parallel Programming { Workshop on Fault-Tolerant Parallel and Distributed Systems All papers published in the workshops proceedings were selected by the p- gram committee on the basis of referee reports. Each paper was reviewed by independent referees who judged the papers for originality, quality, and cons- tency with the themes of the workshops.