This book contains the papers that have been presented at the ninth Very Large Scale Integrated Systems conference VLSI'97 that is organized biannually by IFIP Working Group 10.5. It took place at Hotel Serra Azul, in Gramado Brazil from 26-30 August 1997. Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble and Tokyo. The papers in this book report on all aspects of importance to the design of the current and future integrated systems. The current trend towards the realization of versatile Systems-on-a-Chip require attention of embedded hardware/software systems, dedicated ASIC hardware, sensors and actuators, mixed analog/digital design, video and image processing, low power battery operation and wireless communication. The papers as presented in Jhis book have been organized in two tracks, where one is dealing with VLSI System Design and Applications and the other presents VLSI Design Methods and CAD. The following topics are addressed: VLSI System Design and Applications Track • VLSI for Video and Image Processing. • Microsystem and Mixed-mode design. • Communication And Memory System Design • Cow-voltage & Low-power Analog Circuits. • High Speed Circuit Techniques • Application Specific DSP Architectures. VLSI Design Methods and CAD Track • Specification and Simulation at System Level. • Synthesis and Technology Mapping. • CAD Techniques for Low-Power Design. • Physical Design Issues in Sub-micron Technologies. • Architectural Design and Synthesis. • Testing in Complex Mixed Analog and Digital Systems.

This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products. It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements.

iming, timing, timing! That is the main concern of a digital designer charged with designing a semiconductor chip. What is it, how is it T described, and how does one verify it? The design team of a large digital design may spend months architecting and iterating the design to achieve the required timing target. Besides functional verification, the t- ing closure is the major milestone which dictates when a chip can be - leased to the semiconductor foundry for fabrication. This book addresses the timing verification using static timing analysis for nanometer designs. The book has originated from many years of our working in the area of timing verification for complex nanometer designs. We have come across many design engineers trying to learn the background and various aspects of static timing analysis. Unfortunately, there is no book currently ava- able that can be used by a working engineer to get acquainted with the - tails of static timing analysis. The chip designers lack a central reference for information on timing, that covers the basics to the advanced timing veri- cation procedures and techniques.

Compendio de los trabajos presentados en Toledo durante el 2nd Workshop on Libraries, component modeling and quality assurance.

The Asia and South Pacific conference on design automation is the second in a series of biennial international conferences. It aims to provide the CAD/DA community with the opportunity to present ideas and concepts on upperstream design as well as methodologies of downstream design.