"Modern integrated microsystems have several functional blocks which require different voltages to operate adequately. Charge pump circuits are used to generate different voltages to operate adequately. Charge pump circuits are used to generate different voltage domains for different functional blocks on large integrated microsystems. Charge pump is an inductorless DC-DC converter which generates higher positive voltage or lower negative voltage from the applied reference voltage. The thesis presents a high power-efficiency charge pump architecture with low output ripple noise in AMI 0.5 [micron] CMOS process technology. The switching action of the proposed charge pump architecture is controlled by a dual phase non-overlapping clock system. In order to achieve high power-efficiency, the power losses due to the leakage currents, the finite switch resistance and the imperfect charge transfer between the capacitors are taken into consideration and are minimized by proper switching of the charge transfer switches. The proposed charge pump can operate over the wide input voltage range varying from 3 V to 7 V with the power conversion efficiency of 90%. The loading current drive capability of the proposed charge pump ranges from 0 to 45 mA."--Abstract.

In this thesis, the literature relating to charge pump dc-dc converters and their uses is reviewed. Charge pumps are useful in many circuits, including low-voltage circuits, dynamic random access memory circuits, switched-capacitor circuits, EEPROM's and transceivers. The important issues relating to charge pump design are power efficiency, output voltage ripple and area efficiency. This thesis describes the operation of three types of charge pump circuits. Power efficiency theory of charge pumps is discussed in detail. A method of estimating the output ripple of a charge pump from the size of the capacitors used is described. The optimal distribution of available capacitance for minimizing output ripple or maximizing power efficiency is derived. The tradeoffs between output ripple, power efficiency and total capacitance are discussed. The considerations involved in the design of charge pump circuits are described. A new charge pump circuit that uses two cascoded buffer transistors to improve the area efficiency is proposed. An implementation consisting of one of each of the three types of charge pumps was simulated for a 0.35-micron CMOS process. The simulation results verify the improved area efficiency of the double cascode charge pump.

This book enables readers to gain a deep understanding of the challenges related to the design of a charge pump (CP). Analysis, modeling, design strategies and topologies are treated in detail. Novel and high-performance CP topologies and related design are organized in a coherent manner, with particular care devoted to ultra-low power and energy harvesting applications. The authors provide basic theoretical foundations as needed, in order to set the stage for readers’ comprehension of analyses and results. Exhaustive methodologies are presented and analytical derivations are included, enabling readers to gain insight on the main dependencies among the relevant circuit parameters. Although the material is presented in a formal and theoretical manner, emphasis is on the design perspective, using many practical examples and measured results.

High-efficiency power delivery, as well as low-power circuit design continues to be an important concern in energy harvesting circuits and application that are limited by the battery capacity. This thesis presents a high-efficiency switched-capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. It provides for higher efficiency than the conventional CMOS solution. The proposed circuit doubles the ratio of input voltage to output voltage, which is strongly related to its high efficiency. The state of art CMOS-based conventional switched-capacitance charge pump achieve power efficiency as 82% and output as 1.8V with 1.0V input voltage with 130nm technology. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with uni-directional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and power-conversion-efficiency (PCE). Simulation results show that the proposed HTFET charge pump achieves 90.4% and 91.4% power conversion efficiency with a 1.0 k[omega] resistive load. The DC results obtained are 0.37 V and 0.57 V, when the input voltage is 0.20 V and 0.30 V, respectively.

With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting.

Due to the continuous power supply reduction, Charge Pumps, also referred to as DC-DC converters, circuits are widely used in integrated circuits (ICs) to generate high voltages for many applications, such as EEP-ROMs, Flash memories for programming and erasing of the floating gate, switched capacitor circuits, operational amplifiers, voltage regulators, LCD drivers, piezoelectricactuators, etc. A charge pump is a kind of DC to DC converter that uses capacitors as energy storage elements to create either a higher or lower voltage power source. The development of the charge pumps is motivated by ever increasing the needs for the small form factor (i.e small size and low weight), high-conversion-efficiency and low costpower management system, which is the best candidate suitable to meet the needs of continuosly shrinking portable electronic devices like MP3 players, cellular phones, PDA's.