A logic system is developed for use in design procedures involving the application of common emitter transistor circuits operating in the switching mode. The presence of common emitter transistor switches normally requires the use of Sheffer Stroke (Not-And) and/or Nor (Not-Or) logic functions to describe the resultant logic behavior in circuit applications, because of the inherent phase reversal in transfer characteristics. A dual-level logic convention is proposed whereby the procedure for noninverting circuitry is applied to inverting circuitry. The characteristics phase reversal need not be taken into account if reverse level is satisfactory as an output.