ULSI Process Integration 6 covers all aspects of process integration. Sections are devoted to 1) Device Technologies, 2) Front-end-of-line integration (gate stacks, shallow junctions, dry etching, etc.), 3) Back-end-of-line integration (CMP, low-k, Cu interconnect, air-gaps, 3D packaging, etc.), 4) Alternative channel technologies (Ge, III-V, hybrid integration), and 5) Emerging technologies (CNT, graphene, polymer electronics, nanotubes).

The symposium provided a forum for reviewing and discussing all aspects of process integration, with special focus on nanoscaled technologies, 65 nm and beyond on DRAM, SRAM, flash memory, high density logic-low power, RF, mixed analog-digital, process integration yield, CMP chemistries, low-k processes, gate stacks, metal gates, rapid thermal processing, silicides, copper interconnects, carbon nanotubes, novel materials, high mobility substrates (SOI, sSi, SiGe, GeOI), strain engineering, and hybrid integration.

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirements Low-k materials: fundamentals, advances and mechanical properties Conductive layers and barriers Integration and reliability including mechanical reliability, electromigration and electrical breakdown New approaches including 3D, optical, wireless interchip, and carbon-based interconnects Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.