According to market analysts, the market for consumer electronics will con tinue to grow at a rate higher than that of electronic systems in general. The consumer market can be characterized by rapidly growing complexities of appli cations and a rather short market window. As a result, more and more complex designs have to be completed in shrinking time frames. A key concept for coping with such stringent requirements is re-use. Since the re-use of completely fixed large hardware blocks is limited to subproblems of system-level applications (for example MPEG-2), flexible, programmable pro cessors are being used as building blocks for more and more designs. Processors provide a unique combination offeatures: they provide flexibility and re-use. The processors used in consumer electronics are, however, in many cases dif ferent from those that are used for screen and keyboard-based equipment, such as PCs. For the consumer market in particular, efficiency of the product plays a dominating role. Hence, processor architectures for these applications are usually highly-optimized and tailored towards a certain application domain.

It is well known that embedded systems have to be implemented efficiently. This requires that processors optimized for certain application domains are used in embedded systems. Such an optimization requires a careful exploration of the design space, including a detailed study of cost/performance tradeoffs. In order to avoid time-consuming assembly language programming during design space exploration, compilers are needed. In order to analyze the effect of various software or hardware configurations on the performance, retargetable compilers are needed that can generate code for numerous different potential hardware configurations. This book provides a comprehensive and up-to-date overview of the fast developing area of retargetable compilers for embedded systems. It describes a large set important tools as well as applications of retargetable compilers at different levels in the design flow. Retargetable Compiler Technology for Embedded Systems is mostly self-contained and requires only fundamental knowledge in software and compiler design. It is intended to be a key reference for researchers and designers working on software, compilers, and processor optimization for embedded systems.

It gives me immense pleasure to introduce this timely handbook to the research/- velopment communities in the ?eld of signal processing systems (SPS). This is the ?rst of its kind and represents state-of-the-arts coverage of research in this ?eld. The driving force behind information technologies (IT) hinges critically upon the major advances in both component integration and system integration. The major breakthrough for the former is undoubtedly the invention of IC in the 50’s by Jack S. Kilby, the Nobel Prize Laureate in Physics 2000. In an integrated circuit, all components were made of the same semiconductor material. Beginning with the pocket calculator in 1964, there have been many increasingly complex applications followed. In fact, processing gates and memory storage on a chip have since then grown at an exponential rate, following Moore’s Law. (Moore himself admitted that Moore’s Law had turned out to be more accurate, longer lasting and deeper in impact than he ever imagined. ) With greater device integration, various signal processing systems have been realized for many killer IT applications. Further breakthroughs in computer sciences and Internet technologies have also catalyzed large-scale system integration. All these have led to today’s IT revolution which has profound impacts on our lifestyle and overall prospect of humanity. (It is hard to imagine life today without mobiles or Internets!) The success of SPS requires a well-concerted integrated approach from mul- ple disciplines, such as device, design, and application.

Today’s embedded devices and sensor networks are becoming more and more sophisticated, requiring more efficient and highly flexible compilers. Engineers are discovering that many of the compilers in use today are ill-suited to meet the demands of more advanced computer architectures. Updated to include the latest techniques, The Compiler Design Handbook, Second Edition offers a unique opportunity for designers and researchers to update their knowledge, refine their skills, and prepare for emerging innovations. The completely revised handbook includes 14 new chapters addressing topics such as worst case execution time estimation, garbage collection, and energy aware compilation. The editors take special care to consider the growing proliferation of embedded devices, as well as the need for efficient techniques to debug faulty code. New contributors provide additional insight to chapters on register allocation, software pipelining, instruction scheduling, and type systems. Written by top researchers and designers from around the world, The Compiler Design Handbook, Second Edition gives designers the opportunity to incorporate and develop innovative techniques for optimization and code generation.

Modern electronics is driven by the explosive growth of digital communications and multi-media technology. A basic challenge is to design first-time-right complex digital systems, that meet stringent constraints on performance and power dissipation. In order to combine this growing system complexity with an increasingly short time-to-market, new system design technologies are emerging based on the paradigm of embedded programmable processors. This concept introduces modularity, flexibility and re-use in the electronic system design process. However, its success will critically depend on the availability of efficient and reliable CAD tools to design, programme and verify the functionality of embedded processors. Recently, new research efforts emerged on the edge between software compilation and hardware synthesis, to develop high-quality code generation tools for embedded processors. Code Generation for Embedded Systems provides a survey of these new developments. Although not limited to these targets, the main emphasis is on code generation for modern DSP processors. Important themes covered by the book include: the scope of general purpose versus application-specific processors, machine code quality for embedded applications, retargetability of the code generation process, machine description formalisms, and code generation methodologies. Code Generation for Embedded Systems is the essential introduction to this fast developing field of research for students, researchers, and practitioners alike.

Created through a student-tested, faculty-approved review process with input from more than 250 students and faculty, GOVT is an engaging and accessible solution to accommodate the diverse learning styles of today's learners at a value-based price. Focusing on the current and historical conflicts and controversies that define America as a nation, GOVT is a streamlined and extremely current text for the American Government course. Its motivating debate theme and appealing modern format speak directly to today's student. A full suite of learning tools--correlated to the text chapter-by-chapter--are available through CourseMate and include an eBook, Chapter In Review cards, videos, simulations, podcasts, and quizzes that allow students to learn and study wherever they are and whenever they have time.

This volume constitutes the proceedings of the second International Conference on Generative Programming and Component Engineering (GPCE 2003), held September 22–25, 2003, in Erfurt, Germany, sponsored by the NetObjectDays German industrial software development event, in cooperation with the ACM SIGPLAN and SIGSOFT societies. GPCE was created as an e?ort to bring - getherresearchersworkingonboththeprogramminglanguagesandthesoftware engineeringsideofprogramgenerationandcomponentengineering. Thecommon theme of program generation and component engineering is the domain-speci?c nature of both approaches. Depending on the characteristics of a domain, either a generative or a compositional technical solution may be appropriate. In just its second year, GPCE has shown a lot of promise for building a strong community. The response to the call for papers was excellent, with 62 submissions to the technical program, 2 of which were later withdrawn. Each paper received between three and ?ve reviews, many of them quite thorough and hopefully valuable to all authors. The electronic meeting allowed for - depthdiscussionsofallsubmissions,oftentoamuchgreaterextentthanpossible in a physical PC meeting. As a result, 21 papers were selected for presentation at the conference and are included in this volume, together with abstracts for the invited talks by Olivier Danvy and Peri Tarr. Of the accepted papers, 3 are co-authored by PC members (from a total of 5 PC submissions). We tried hard to ensure fairness and hold PC submissions to a high standard. The EDAS conference submission system was used to manage the paper submissions. Our EDAS installation was supported by Blair MacIntyre, who was particularlyhelpfulinresolvingtechnicalissueswiththesystem.