In this volume drawn from the VLSI Handbook, the focus is on logic design and compound semiconductor digital integrated circuit technology. Expert discussions cover topics ranging from the basics of logic expressions and switching theory to sophisticated programmable logic devices and the design of GaAs MESFET and HEMT logic circuits. Logic Design

Over the years, the fundamentals of VLSI technology have evolved to include a wide range of topics and a broad range of practices. To encompass such a vast amount of knowledge, The VLSI Handbook focuses on the key concepts, models, and equations that enable the electrical engineer to analyze, design, and predict the behavior of very large-scale integrated circuits. It provides the most up-to-date information on IC technology you can find. Using frequent examples, the Handbook stresses the fundamental theory behind professional applications. Focusing not only on the traditional design methods, it contains all relevant sources of information and tools to assist you in performing your job. This includes software, databases, standards, seminars, conferences and more. The VLSI Handbook answers all your needs in one comprehensive volume at a level that will enlighten and refresh the knowledge of experienced engineers and educate the novice. This one-source reference keeps you current on new techniques and procedures and serves as a review for standard practice. It will be your first choice when looking for a solution.

This book opens with a simple introduction to financial markets, attempting to understand the action and the players of Wall Street by comparing them to the action and the players of main street. Firstly, it explores the definition of a security by its function, the departure from the buyer beware environment of corporate law and the entrance into the seller disclose environment of securities law. Secondly, it shows that the cost of disclosure rules is justified by their capacity to combat irrationalities, fads, and panics. The third section explains how the structure of class actions is designed to improve deterrence. Next it explores the economic harm from insider trading and how the law fights it. In sum, the book shows how all these parts of securities law serve the virtuous cycle from liquidity to accurate prices and more trading and how the great recession showed that our securities regulation reacted mostly adequately to the crisis.

The Verilog Programming Language Interface is a powerful feature of the Verilog standard. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired, such as adding custom design debug utilities, adding proprietary file read/write utilities, and interfacing bus functional C language models to a simulator. This book serves as both a user's guide for learning the Verilog PLI, and as a comprehensive reference manual on the Verilog PLI standard. Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of the PLI are presented, based on the IEEE 1364 Verilog standard. The second edition of this book adds detailed coverage of the many enhancements added in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001").

The design of digital (computer) systems requires several design phases: from the behavioural design, over the logical structural design to the physical design, where the logical structure is implemented in the physical structure of the system (the chip). Due to the ever increasing demands on computer system performance, the physical design phase being one of the most complex design steps in the entire process. The major goal of this book is to develop a priori wire length estimation methods that can help the designer in finding a good lay-out of a circuit in less iterations of physical design steps and that are useful to compare different physical architectures. For modelling digital circuits, the interconnection complexity is of major importance. It can be described by the so called Rent's rule and the Rent exponent. A Priori Wire Length Estimates for Digital Design will provide the reader with more insight in this rule and clearly outlines when and where the rule can be used and when and where it fails. Also, for the first time, a comprehensive model for the partitioning behaviour of multi-terminal nets is developed. This leads to a new parameter for circuits that describes the distribution of net degrees over the nets in the circuit. This multi-terminal net model is used throughout the book for the wire length estimates but it also induces a method for the generation of synthetic benchmark circuits that has major advantages over existing benchmark generators. In the domain of wire length estimations, the most important contributions of this work are (i) a new model for placement optimization in a physical (computer) architecture and (ii) the inclusion of the multi-terminal net model in the wire length estimates. The combination of the placement optimization model with Donath's model for a hierarchical partitioning and placement results in more accurate wire length estimates. The multi-terminal net model allows accurate assessments of the impact of multi-terminal nets on wire length estimates. We distinguish between `delay-related applications,' for which the length of source-sink pairs is important, and `routing-related applications,' for which the entire (Steiner) length of the multi-terminal net has to be taken into account. The wire length models are further extended by taking into account the interconnections between internal components and the chip boundary. The application of the models to three-dimensional systems broadens the scope to more exotic architectures and to opto-electronic design techniques. We focus on anisotropic three-dimensional systems and propose a way to estimate wire lengths for opto-electronic systems. The wire length estimates can be used for prediction of circuit characteristics, for improving placement and routing tools in Computer-Aided Design and for evaluating new computer architectures. All new models are validated with experiments on benchmark circuits.

This book studies the changing social relations in a region of Costa Rica that does not conform to the country's image as an "agrarian democracy" and investigates why latifundios (large unproductive or under-utilized estates) still dominate much of Latin America.