The rapid advancement in semiconductor technology continues to change the environment in which computers are designed. As hardware costs decline, systems with multiple processors become an interesting alternative to conventional single processor system. An analytic model has been developed to describe the performance of a wide range of multiprocessor system configurations and workloads. This model deals specifically with P tightly-coupled, identical processors with shared primary and secondary memory. Secondary memory consists of a paging drum with S sectors. The workload consists of J independent, identically-distributed jobs whose faulting or I/O behavior is described by both a mean (lambda faults/sector-time) and a squared coefficient of variation (K). In addition, the processing overhead for each I/O request is added to a job's execution time at a processor (C) sector-times/fault). The model developed provides an estimate of system throughput for various numbers of processors, jobs, and drum sectors, and for various workloads. The model can be used to examine the behavior of multiprocessor systems, including the sensitivity of system throughput to each of the system parameters and parameters trade-offs related to system performance. In particular, in a system with a fixed amount of memory, the addition of jobs to the system causes a change in the memory allocation for each job and thus modifies each job's faulting behavior. The above formula for throughput is useful to examine the desirability of adding or subtracting jobs in such a system.

As computers become more complex, the number and complexity of the tasks facing the computer architect have increased. Computer performance often depends in complex way on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity. This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.

Computer Systems Organization -- Performance of Systems.

These proceedings consist of papers presented at the International Workshop organized by the Commission of the European Communities, Joint Research Centre, Ispra Establishment, Department A, in Ispra (Varese) Italy, October 4-6, 1976. Topics addressed in this conference include probabilistic modeling of computer systems, analysis of schedules of computations and tasks, queueing networks, and simulation models. Applications include program behavior measurements and models, scheduling of multiprocessor systems, and reliable processing in the presence of system failures.

The report presents a comprehensive set of hierarchically organized modular analytical models developed for the performance evaluation of multiprogrammed virtual-memory time-shared computer systems using demand paging. The hierarchy of models contains a user behavior model, a secondary memory model, a program behavior model, a processor model, and a total system model. This thesis is particularly concerned with the last three models. The program behavior model developed in this thesis permits one to estimate the frequency of paging expected on a given processing system. The processor model enables one to evaluate the throughput of a given multi-processor multi-memory processing system under multiprogramming. Finally, the total system model allows us to derive the response time distribution of an entire computer system under study. The report includes two PL/I programs. (Author).