The performance of the turn back switches and blocking switches are compared. This lead us to propose the "rotating switch" which combines the advantages of the turn back switch and the blocking switch; we then evaluate its performance relative to the blocking switch and the turn back switch."

Abstract: "Multistage interconnection networks (Banyan networks) are frequently proposed as connections in multiprocessor systems, in ATM switches or in Gigabit Ethernet switches. There exist several analytical models describing the performance of such networks. Using analytical models the performance can be determined much faster than by simulation. On the other hand, the development of an analytical model is very time-consuming. In this paper, we present a method for an automatic and fast generation of an analytical network model. The generated analysis copes with networks of arbitrary size, arbitrary switching element sizes, arbitrary buffer lengths in each network stage, an arbitrary (but uniform) traffic pattern including multicast traffic, and an arbitrarily chosen network load."

Abstract: "In this correspondence, we propose a design and analysis technique for a class of Multistage Interconnection Networks (MINs). This class of MINs have finite buffers at the input side of their switch elements and operate in a synchronous packet-switched mode. We first examine the important issue of different clock periods in the synchronous MIN analysis. Then we analyze our 'small cycle' design with a simple analytical model and compare the results with that of a somewhat standard 'big cycle' model that is currently used. The significant performance improvement of our model is shown based on various clock width, data width, and buffer length."