This book is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. This implementation is demonstrated by the presentation of several circuits where the MOS parametric amplifier cell is used: small gain amplifier, comparator with embedded pre-amplification, discrete-time mixer/IIR-Filter, and analog-to-digital converter (ADC). Experimental results are shown to validate the overall design technique.

This book is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. This implementation is demonstrated by the presentation of several circuits where the MOS parametric amplifier cell is used: small gain amplifier, comparator with embedded pre-amplification, discrete-time mixer/IIR-Filter, and analog-to-digital converter (ADC). Experimental results are shown to validate the overall design technique.

This book constitutes the refereed proceedings of the 4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013, held in Costa de Caparica, Portugal, in April 2013. The 69 revised full papers were carefully reviewed and selected from numerous submissions. They cover a wide spectrum of topics ranging from collaborative enterprise networks to microelectronics. The papers are organized in the following topical sections: collaborative enterprise networks; service orientation; intelligent computational systems; computational systems; computational systems applications; perceptional systems; robotics and manufacturing; embedded systems and Petri nets; control and decision; integration of power electronics systems with ICT; energy generation; energy distribution; energy transformation; optimization techniques in energy; telecommunications; electronics: devices design; electronics: amplifiers; electronics: RF applications; and electronics: applications.

This book provides readers with a single-source reference to the state-of-the-art in analog and mixed-signal circuit design in nanoscale CMOS. Renowned authors from academia describe creative circuit solutions and techniques, in state-of-the-art designs, enabling readers to deal with today’s technology demands for high integration levels with a strong miniaturization capability.

This book is based on the 18 tutorials presented during the 23rd workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, serving as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.

Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology, and adequate use of the knowledge database. Starting with the basics, Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design introduces the essential fundamental concepts for designing analog circuits with optimal performances. This book explains the links between the physics and technology of scaled MOS transistors and the design and simulation of nano-scale analog circuits. It also explores the development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits. The book outlines the general trends of technology scaling with respect to device geometry, process parameters, and supply voltage. It describes models and optimization techniques, as well as the compact modeling of scaled MOS transistors for VLSI circuit simulation. • Includes two learning-based methods: the artificial neural network (ANN) and the least-squares support vector machine (LS-SVM) method • Provides case studies demonstrating the practical use of these two methods • Explores circuit sizing and specification translation tasks • Introduces the particle swarm optimization technique and provides examples of sizing analog circuits • Discusses the advanced effects of scaled MOS transistors like narrow width effects, and vertical and lateral channel engineering Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design describes the models and CAD techniques, explores the physics of MOS transistors, and considers the design challenges involving statistical variations of process technology parameters and reliability constraints related to circuit design.