This book provides readers with a variety of tools to address the challenges posed by hot carrier degradation, one of today’s most complicated reliability issues in semiconductor devices. Coverage includes an explanation of carrier transport within devices and book-keeping of how they acquire energy (“become hot”), interaction of an ensemble of colder and hotter carriers with defect precursors, which eventually leads to the creation of a defect, and a description of how these defects interact with the device, degrading its performance.

As device dimensions decrease, hot-carrier effects, which are due mainly to the presence of a high electric field inside the device, are becoming a major design concern. On the one hand, the detrimental effects-such as transconductance degradation and threshold shift-need to be minimized or, if possible, avoided altogether. On the other hand, performance such as the programming efficiency of nonvolatile memories or the carrier velocity inside the devices-need to be maintained or improved through the use of submicron technologies, even in the presence of a reduced power supply. As a result, one of the major challenges facing MOS design engineers today is to harness the hot-carrier effects so that, without sacrificing product performance, degradation can be kept to a minimum and a reli able design obtained. To accomplish this, the physical mechanisms re sponsible for the degradations should first be experimentally identified and characterized. With adequate models thus obtained, steps can be taken to optimize the design, so that an adequate level of quality assur ance in device or circuit performance can be achieved. This book ad dresses these hot-carrier design issues for MOS devices and circuits, and is used primarily as a professional guide for process development engi neers, device engineers, and circuit designers who are interested in the latest developments in hot-carrier degradation modeling and hot-carrier reliability design techniques. It may also be considered as a reference book for graduate students who have some research interests in this excit ing, yet sometime controversial, field.

As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.

Providing an important link between the theoretical knowledge in the field of non-linier physics and practical application problems in microelectronics, the purpose of the book is popularization of the physical approach for reliability assurance. Another unique aspect of the book is the coverage given to the role of local structural defects, their mathematical description, and their impact on the reliability of the semiconductor devices.

This publication is a compilation of papers presented at the Semiconductor Device Reliabi lity Workshop sponsored by the NATO International Scientific Exchange Program. The Workshop was held in Crete, Greece from June 4 to June 9, 1989. The objective of the Workshop was to review and to further explore advances in the field of semiconductor reliability through invited paper presentations and discussions. The technical emphasis was on quality assurance and reliability of optoelectronic and high speed semiconductor devices. The primary support for the meeting was provided by the Scientific Affairs Division of NATO. We are indebted to NATO for their support and to Dr. Craig Sinclair, who admin isters this program. The chapters of this book follow the format and order of the sessions of the meeting. Thirty-six papers were presented and discussed during the five-day Workshop. In addi tion, two panel sessions were held, with audience participation, where the particularly controversial topics of bum-in and reliability modeling and prediction methods were dis cussed. A brief review of these sessions is presented in this book.

This book examines in detail how a semiconductor device is designed and fabricated to satisfy best the requirements of the target application. The author presents and explains both basic and state-of-art semiconductor industry standards used in large/small signal equivalent circuit models for semiconductor devices that electronics engineers routinely use in their design calculations. The presentation includes detailed, step-by-step information on how a semiconductor device is fabricated, and the very sophisticated supporting technologies used in the process flow. The author also explains how standard laboratory equipment can be used to extract useful performance metrics of a semiconductor device.

The exploding number of uses for ultrafast, ultrasmall integrated circuits has increased the importance of hot-carrier effects in manufacturing as well as for other technological applications. They are rapidly movingout of the research lab and into the real world. This book is derived from Dr. Takedas book in Japanese, Hot-Carrier Effects, (published in 1987 by Nikkei Business Publishers). However, the new book is much more than a translation. Takedas original work was a starting point for developing this much more complete and fundamental text on this increasingly important topic. The new work encompasses not only all the latest research and discoveries made in the fast-paced area of hot carriers, but also includes the basics of MOS devices, and the practical considerations related to hot carriers. - Chapter one itself is a comprehensive review of MOS device physics which allows a reader with little background in MOS devices to pick up a sufficient amount of information to be able to follow the rest of the book - The book is written to allow the reader to learn about MOS Device Reliability in a relatively short amount of time, making the texts detailed treatment of hot-carrier effects especially useful and instructive to both researchers and others with varyingamounts of experience in the field - The logical organization of the book begins by discussing known principles, then progresses to empirical information and, finally, to practical solutions - Provides the most complete review of device degradation mechanisms as well as drain engineering methods - Contains the most extensive reference list on the subject