This book enables readers to gain a deep understanding of the challenges related to the design of a charge pump (CP). Analysis, modeling, design strategies and topologies are treated in detail. Novel and high-performance CP topologies and related design are organized in a coherent manner, with particular care devoted to ultra-low power and energy harvesting applications. The authors provide basic theoretical foundations as needed, in order to set the stage for readers’ comprehension of analyses and results. Exhaustive methodologies are presented and analytical derivations are included, enabling readers to gain insight on the main dependencies among the relevant circuit parameters. Although the material is presented in a formal and theoretical manner, emphasis is on the design perspective, using many practical examples and measured results.

Charge pumps are finding increased attention and diversified usage in the new era of nanometer-generation chips used in different systems. This book explains the different architectures and requirements for an efficient charge pump design and explains each step in detail. It's filled with extra hands-on design information, potential pitfalls to avoid, and practical ideas harnessed from the authors' extensive experience designing charge pumps.

Due to the continuous power supply reduction, Charge Pumps, also referred to as DC-DC converters, circuits are widely used in integrated circuits (ICs) to generate high voltages for many applications, such as EEP-ROMs, Flash memories for programming and erasing of the floating gate, switched capacitor circuits, operational amplifiers, voltage regulators, LCD drivers, piezoelectricactuators, etc. A charge pump is a kind of DC to DC converter that uses capacitors as energy storage elements to create either a higher or lower voltage power source. The development of the charge pumps is motivated by ever increasing the needs for the small form factor (i.e small size and low weight), high-conversion-efficiency and low costpower management system, which is the best candidate suitable to meet the needs of continuosly shrinking portable electronic devices like MP3 players, cellular phones, PDA's.

The latest techniques for designing robust, high performance integrated circuits in nanoscale technologies Focusing on a new technological paradigm, this practical guide describes the interconnect-centric design methodologies that are now the major focus of nanoscale integrated circuits (ICs). High Performance Integrated Circuit Design begins by discussing the dominant role of on-chip interconnects and provides an overview of technology scaling. The book goes on to cover data signaling, power management, synchronization, and substrate-aware design. Specific design constraints and methodologies unique to each type of interconnect are addressed. This comprehensive volume also explains the design of specialized circuits such as tapered buffers and repeaters for data signaling, voltage regulators for power management, and phase-locked loops for synchronization. This is an invaluable resource for students, researchers, and engineers working in the area of high performance ICs. Coverage includes: Technology scaling Interconnect modeling and extraction Signal propagation and delay analysis Interconnect coupling noise Global signaling Power generation Power distribution networks CAD of power networks Techniques to reduce power supply noise Power dissipation Synchronization theory and tradeoffs Synchronous system characteristics On-chip clock generation and distribution Substrate noise in mixed-signal ICs Techniques to reduce substrate noise

"Modern integrated microsystems have several functional blocks which require different voltages to operate adequately. Charge pump circuits are used to generate different voltages to operate adequately. Charge pump circuits are used to generate different voltage domains for different functional blocks on large integrated microsystems. Charge pump is an inductorless DC-DC converter which generates higher positive voltage or lower negative voltage from the applied reference voltage. The thesis presents a high power-efficiency charge pump architecture with low output ripple noise in AMI 0.5 [micron] CMOS process technology. The switching action of the proposed charge pump architecture is controlled by a dual phase non-overlapping clock system. In order to achieve high power-efficiency, the power losses due to the leakage currents, the finite switch resistance and the imperfect charge transfer between the capacitors are taken into consideration and are minimized by proper switching of the charge transfer switches. The proposed charge pump can operate over the wide input voltage range varying from 3 V to 7 V with the power conversion efficiency of 90%. The loading current drive capability of the proposed charge pump ranges from 0 to 45 mA."--Abstract.