In order to meet the demands of data-hungry applications, modern data storage systems are expected to be increasingly denser. This is a challenging endeavor, and storage engineers are continuously trying to provide novel technologies. However, these new technologies are typically associated with an increase in the number and types of errors, making the goal of securing highly-reliable dense storage devices a tricky challenge. This dissertation focuses on analyzing the errors in addition to providing novel and efficient error correcting coding schemes that are capable of overcoming the aforementioned challenge. In particular, through informed exploitation of the underlying channel characteristics of the storage device being studied, we provide frameworks for systematically generating error correcting codes with mathematical guarantees that offer performance improvements in orders of magnitude relative to the prior state-of-the-art. First, we present a technique to predict the performance of codes given the existence of certain error-prone structures in the graph representation of these codes. Next, we introduce a general framework for the code optimization of non-binary graph-based codes, which works for various interesting channels. Finally, we derive an approach to design high performance spatially-coupled codes particularly for magnetic recording applications. Our frameworks are based on mathematical tools drawn from coding theory and information theory, and rely on advanced mathematical techniques from probability theory, linear algebra, graph theory, combinatorics, and optimization. The proposed frameworks have a vast variety of applications that include both magnetic recording and Flash memory systems. Our frameworks lead to a practical, effective tool for storage engineers to use multi-dimensional storage devices with confidence.

With the massive amount of data produced and stored each year, reliable storage and retrieval of information is more crucial than ever. Robust coding and decoding techniques are critical for correcting errors and maintaining data integrity. Comprising chapters thoughtfully selected from the highly popular Coding and Signal Processing for Magnetic Recording Systems, Advanced Error Control Techniques for Data Storage Systems is a finely focused reference to the state-of-the-art error control and modulation techniques used in storage devices. The book begins with an introduction to error control codes, explaining the theory and basic concepts underlying the codes. Building on these concepts, the discussion turns to modulation codes, paying special attention to run-length limited sequences, followed by maximum transition run (MTR) and spectrum shaping codes. It examines the relationship between constrained codes and error control and correction systems from both code-design and architectural perspectives as well as techniques based on convolution codes. With a focus on increasing data density, the book also explores multi-track systems, soft decision decoding, and iteratively decodable codes such as Low-Density Parity-Check (LDPC) Codes, Turbo codes, and Turbo Product Codes. Advanced Error Control Techniques for Data Storage Systems offers a comprehensive collection of theory and techniques that is ideal for specialists working in the field of data storage systems.

This new edition has been extensively revised to reflect the progress in error control coding over the past few years. Over 60% of the material has been completely reworked, and 30% of the material is original. Convolutional, turbo, and low density parity-check (LDPC) coding and polar codes in a unified framework Advanced research-related developments such as spatial coupling A focus on algorithmic and implementation aspects of error control coding

Nowadays it is hard to find an electronic device which does not use codes: for example, we listen to music via heavily encoded audio CD's and we watch movies via encoded DVD's. There is at least one area where the use of encoding/decoding is not so developed, yet: Flash non-volatile memories. Flash memory high-density, low power, cost effectiveness, and scalable design make it an ideal choice to fuel the explosion of multimedia products, like USB keys, MP3 players, digital cameras and solid-state disk. In ECC for Non-Volatile Memories the authors expose the basics of coding theory needed to understand the application to memories, as well as the relevant design topics, with reference to both NOR and NAND Flash architectures. A collection of software routines is also included for better understanding. The authors form a research group (now at Qimonda) which is the typical example of a fruitful collaboration between mathematicians and engineers.

An accessible textbook that uses step-by-step explanations, relatively easy mathematics and numerous examples to aid student understanding.

This book constitutes the refereed proceedings of the 16th International Symposium on Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, AAECC-16, held in Las Vegas, NV, USA in February 2006. The 25 revised full papers presented together with 7 invited papers were carefully reviewed and selected from 32 submissions. Among the subjects addressed are block codes; algebra and codes: rings, fields, and AG codes; cryptography; sequences; decoding algorithms; and algebra: constructions in algebra, Galois groups, differential algebra, and polynomials.

This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.