As part of the Modern Semiconductor Design series, this book details a broad range of e-based topics including modelling, constraint-driven test generation, functional coverage and assertion checking.

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.

Design Verification with e Samir Palnitkar Written for both experienced and new users, DesignVerification with e gives you a broadcoverage of e . It stresses the practical verification perspective of e rather than emphasizing only itslanguage aspects. This book- Introduces you to e-based verification methodologies Describes e syntax in detail, including structs, units, methods, events, temporal expressions. and TCMs Explains the concepts of automatic generation, checking and coverage Discusses the e Reuse Methodology Describes essential topics such as coverage driven verification, e verification components (eVCs), and interfacing with C/C++ Illustrates a complete verification example in e Contains a quick-reference guide to the e language Offers many practical verification tips Includes over 250 illustrations, examples, andexercises, and a verification resource list. Learning objectives and summariesare provided for each chapter. "Mr. Palnitkar illustrates how and why the power ofthe e verification language and the underlying Specman Elite testbench automationtool are used to develop today's most advanced verification environments. Thisbook is valuable to both the novice and the experienced e user. I highlyrecommend it to anyone exploring functional verification" -Moshe Gavrielov Chief Executive Officer Verisity Design, Inc. "This book demonstrates how e can be used to createstate-of-the-art verification environments. An ideal book to jumpstarta beginner and a handy reference for experts" -Rakesh Dodeja Engineering Manager Intel Corporation "The book gives a simple, logical, and well-organizedpresentation of e with plenty of illustrations. This makes it an ideal text book for universitycourses on functional verification" -Dr. Steven Levitan Professor Department of Electrical Engineering University of Pittsburgh, Pittsburgh, PA "This book is ideal for readers with little or no e programming experience. It gives the reader athorough and practical understanding of not only the e language, but also how to effectively use thislanguage to develop complex functional verification environments." -Bill Schubert Verification Engineer ST Microelectronics, Inc. "The flow of the book is logical and gradual. Plentyof illustrations and examples makes this an ideal book for e users. A must-have for both beginners andexperts" -Karun Menon Staff Engineer Sun Microsystems, Incorporated PRENTICEHALL ProfessionalTechnical Reference UpperSaddle River, NJ 07458 www.phptr.c...

I am glad to see this new book on the e language and on verification. I am especially glad to see a description of the e Reuse Methodology (eRM). The main goal of verification is, after all, finding more bugs quicker using given resources, and verification reuse (module-to-system, old-system-to-new-system etc. ) is a key enabling component. This book offers a fresh approach in teaching the e hardware verification language within the context of coverage driven verification methodology. I hope it will help the reader und- stand the many important and interesting topics surrounding hardware verification. Yoav Hollander Founder and CTO, Verisity Inc. Preface This book provides a detailed coverage of the e hardware verification language (HVL), state of the art verification methodologies, and the use of e HVL as a facilitating verification tool in implementing a state of the art verification environment. It includes comprehensive descriptions of the new concepts introduced by the e language, e language syntax, and its as- ciated semantics. This book also describes the architectural views and requirements of verifi- tion environments (randomly generated environments, coverage driven verification environments, etc. ), verification blocks in the architectural views (i. e. generators, initiators, c- lectors, checkers, monitors, coverage definitions, etc. ) and their implementations using the e HVL. Moreover, the e Reuse Methodology (eRM), the motivation for defining such a gui- line, and step-by-step instructions for building an eRM compliant e Verification Component (eVC) are also discussed.

Design Verification with e Samir Palnitkar Written for both experienced and new users, DesignVerification with e gives you a broadcoverage of e . It stresses the practical verification perspective of e rather than emphasizing only itslanguage aspects. This book-- Introduces you to e-based verification methodologies Describes e syntax in detail, including structs, units, methods, events, temporal expressions. and TCMs Explains the concepts of automatic generation, checking and coverage Discusses the e Reuse Methodology Describes essential topics such as coverage driven verification, e verification components (eVCs), and interfacing with C/C++ Illustrates a complete verification example in e Contains a quick-reference guide to the e language Offers many practical verification tips Includes over 250 illustrations, examples, andexercises, and a verification resource list. Learning objectives and summariesare provided for each chapter. "Mr. Palnitkar illustrates how and why the power ofthe e verification language and the underlying Specman Elite testbench automationtool are used to develop today's most advanced verification environments. Thisbook is valuable to both the novice and the experienced e user. I highlyrecommend it to anyone exploring functional verification"--Moshe Gavrielov Chief Executive Officer Verisity Design, Inc. "This book demonstrates how e can be used to createstate-of-the-art verification environments. An ideal book to jumpstarta beginner and a handy reference for experts" --Rakesh Dodeja Engineering Manager Intel Corporation "The book gives a simple, logical, and well-organizedpresentation of e with plenty of illustrations. This makes it an ideal text book for universitycourses on functional verification" --Dr. Steven Levitan Professor Department of Electrical Engineering University of Pittsburgh, Pittsburgh, PA "This book is ideal for readers with little or no e programming experience. It gives the reader athorough and practical understanding of not only the e language, but also how to effectively use thislanguage to develop complex functional verification environments." --Bill Schubert Verification Engineer ST Microelectronics, Inc. "The flow of the book is logical and gradual. Plentyof illustrations and examples makes this an ideal book for e users. A must-have for both beginners andexperts" --Karun Menon Staff Engineer Sun Microsystems, Inc. PRENTICEHALL ProfessionalTechnical Reference UpperSaddle River, NJ 07458 www.phptr.c ...

The purpose of the book is to train verification engineers on the breadth of technologies available and to give them a utilitarian methodology for making effective use of those technologies. The book is easy to understand and a joy to read. Its organization follows a ‘typical’ verification project from inception to completion, (planning to closure). The book elucidates concepts using non-technical terms and clear entertaining explanations. Analogies to other fields are employed to keep the book light-hearted and interesting.

e-Design: Computer-Aided Engineering Design, Revised First Edition is the first book to integrate a discussion of computer design tools throughout the design process. Through the use of this book, the reader will understand basic design principles and all-digital design paradigms, the CAD/CAE/CAM tools available for various design related tasks, how to put an integrated system together to conduct All-Digital Design (ADD), industrial practices in employing ADD, and tools for product development. - Comprehensive coverage of essential elements for understanding and practicing the e-Design paradigm in support of product design, including design method and process, and computer based tools and technology - Part I: Product Design Modeling discusses virtual mockup of the product created in the CAD environment, including not only solid modeling and assembly theories, but also the critical design parameterization that converts the product solid model into parametric representation, enabling the search for better design alternatives - Part II: Product Performance Evaluation focuses on applying CAE technologies and software tools to support evaluation of product performance, including structural analysis, fatigue and fracture, rigid body kinematics and dynamics, and failure probability prediction and reliability analysis - Part III: Product Manufacturing and Cost Estimating introduces CAM technology to support manufacturing simulations and process planning, sheet forming simulation, RP technology and computer numerical control (CNC) machining for fast product prototyping, as well as manufacturing cost estimate that can be incorporated into product cost calculations - Part IV: Design Theory and Methods discusses modern decision-making theory and the application of the theory to engineering design, introduces the mainstream design optimization methods for both single and multi-objectives problems through both batch and interactive design modes, and provides a brief discussion on sensitivity analysis, which is essential for designs using gradient-based approaches - Tutorial lessons and case studies are offered for readers to gain hands-on experiences in practicing e-Design paradigm using two suites of engineering software: Pro/ENGINEER-based, including Pro/MECHANICA Structure, Pro/ENGINEER Mechanism Design, and Pro/MFG; and SolidWorks-based, including SolidWorks Simulation, SolidWorks Motion, and CAMWorks. Available on the companion website http://booksite.elsevier.com/9780123820389