The topic areas presented within this volume focus on design environments and the applications of hardware description and modelling – including simulation, verification by correctness proofs, synthesis and test. The strong relationship between the topics of CHDL'91 and the work around the use and re-standardization of the VHDL language is also explored. The quality of this proceedings, and its significance to the academic and professional worlds is assured by the excellent technical programme here compiled.

Hardware description languages (HDLs) have established themselves as one of the principal means of designing electronic systems. The interest in and usage of HDLs continues to spread rapidly, driven by the increasing complexity of systems, the growth of HDL-driven synthesis, the research on formal design methods and many other related advances.This research-oriented publication aims to make a strong contribution to further developments in the field. The following topics are explored in depth: BDD-based system design and analysis; system level formal verification; formal reasoning on hardware; languages for protocol specification; VHDL; HDL-based design methods; high level synthesis; and text/graphical HDLs. There are short papers covering advanced design capture and recent work in high level synthesis and formal verification. In addition, several invited presentations on key issues discuss and summarize recent advances in real time system design, automatic verification of sequential circuits and languages for protocol specification.

Languages for precisely describing the behavior of computers have been studied since the conception of the computer itself. As the computer industry has grown, so has the need to exchange information about computers. Computer Hardware Description Languages (CHDL) are required to: - provide specifications and detailed implementation for a growing menu of sophisticated design automation tools, including synthesis, verification, simulation, analysis, optimization, placement, wiring and testing - communicate requirements and capabilities between suppliers and users of computer components and subsystems - facilitate the transfer of new methods and results within the university and industrial research community. As reflected in this book, there is an increased emphasis on applications and resulting requirements that are placed on CHDLs. In the field of synthesis, a major application area, there is today a focus on high-level synthesis and synthesis under design constraints. In the area of design correctness, research has shifted away from simulation to formal verification techniques such as temporal logic.

The symposium on which this book is based has become established as the focal point for the meeting of experts in the field of formal descriptions of hardware and their use in analysis and synthesis of digital systems. The papers reflect the gradual shift from the original emphasis on the uses of language design to describe hardware, toward more formal techniques for specification and verification.

Hardbound. The papers of this seventh conference reflect the gradual shift from the original emphasis on the uses of language design to describe hardware, toward more formal techniques for specification and verification.This volume highlights the following topics: - Languages to specify and describe hardware design, to reason about timing and functional behaviour, and to support modelling and performance evaluation - Synthesis and verification of systems as means of support for the design process, and as a guarantee of design consistency and functional correctness - Tool Integration aspects such as the representation of design information, and the putting together of tools within a coherent design environment.

The topic areas presented within this volume focus on design environments and the applications of hardware description and modelling - including simulation, verification by correctness proofs, synthesis and test. The strong relationship between the topics of CHDL'91 and the work around the use and re-standardization of the VHDL language is also explored. The quality of this proceedings, and its significance to the academic and professional worlds is assured by the excellent technical programme here compiled.