A comprehensive reference and guide book to the world's #1 64-bit processor, Alpha from Digital Equipment Corporation. The book explains the motivation and rationale for the Alpha architecture, and how to use its instruction set to solve real problems.

Alpha Architecture Reference Manual, Third Edition is the authoritative reference on the definition of Alpha architecture. Revised by the Alpha Architecture Committee, this book contains a complete description of the common architecture required of all implementations and describes the interfaces to support the Windows NT, Digital UNIX, and OpenVMS operating systems. The third edition reflects the latest implementations of the architecture, including the 21164A, 21164PC, and 21264. Some of the extensions to the architecture and the enhancement to the technical content include: new byte and word load, store and sign-extend operations; new multimedia instructions; new population enumeration and floating-point square root instructions; new instructions to improve data cache efficiency and updated Windows NT section. The Alpha chip is the fastest chip on the marketplace today. It runs Windows NT, UNIX and OpenVMS operating systems. New base-level server configurations provide four times the memory of current systems. Contains updated Windows NT section to reflect current technical port to Alpha Includes new insights into the software aspects of the implementation Covers new multimedia instructions for increased performance with high-end graphics applications

Details RISC design principles as well as explains the differences between this and other designs. Helps readers acquire hands-on assembly language programming experience

Step-by-step guide to assembly language for the 64-bit Itanium processors, with extensive examples Details of Explicitly Parallel Instruction Computing (EPIC): Instruction set, addressing, register stack engine, predication, I/O, procedure calls, floating-point operations, and more Learn how to comprehend and optimize open source, Intel, and HP-UX compiler output Understand the full power of 64-bit Itanium EPIC processors Itanium(R) Architecture for Programmers is a comprehensive introduction to the breakthrough capabilities of the new 64-bit Itanium architecture. Using standard command-line tools and extensive examples, the authors illuminate the Itanium design within the broader context of contemporary computer architecture via a step-by-step investigation of Itanium assembly language. Coverage includes: The potential of Explicitly Parallel Instruction Computing (EPIC) Itanium instruction formats and addressing modes Innovations such as the register stack engine (RSE) and extensive predication Procedure calls and procedure-calling mechanisms Floating-point operations I/O techniques, from simple debugging to the use of files Optimization of output from open source, Intel, and HP-UX compilers An essential resource for both computing professionals and students of architecture or assembly language, Itanium Architecture for Programmers includes extensive printed and Web-based references, plus many numeric, essay, and programming exercises for each chapter.

Alpha AXP Architecture Reference Manual, Second Edition describes the required behavior of all Alpha implementations, as seen by the machine-language programmer. This book discusses Alpha single-board computers, which have been introduced to cover the high-end embedded controller market. Organized into five parts, this edition begins with an overview of the instruction-set architecture. This text then describes the supporting PALcode routines for three operating systems. Other parts consider a particular console implementation that is specific to platforms that support the OpenVMS AXP or DEC OSF/1 operating systems. This book discusses as well the specific operating system PALcode architecture. The final part provides a discussion of console issues for Windows NT with its PALcode description. This book is a valuable resource for machine-language programmers.

Practicing computer engineers and graduate students in computer architecture alike will find this reference book invaluable as it describes the tradeoffs and design philosophy that lead to the development of the Alpha architecture and its implementation. Alpha Architecture and Implementation provides a comprehensive description of all major aspects of Alpha systems. The book includes an overview of the history of RISC development in the computer industry and at Digital, the Alpha Architecture, all the major processor chips, and system implementations. The book also covers RISC concept and design styles, and provides an overview of other RICS architectures and descriptions of the new SPARC, MIPS, Power PC and PA-RISC microprocessors introduced in 1995. The book also discusses operating system porting issues, compiler techniques and binary translation. Dileep Bhankdarkar was a senior consulting engineering in the Alpha Systems Business Group at Digital Equipment Corporation. He has been responsible for leading the technical direction and product strategy of Alpha Personal Systems, Alpha and VAX Servers and High Performance Computing. He was the architecture manager for microVAX, chief architect for VAX vector processing and co-architect of the PRISM RISC architecture on which Alpha is based. He has a BTech degree in electrical engineering from the Indian Institute of Technology in Bombay, and an MS and PhD in electrical engineering from Carnegie-Mellon University. Dileep holds 15 US patents and is senior member of IEEE. He is the author of more than 30 technical publication on computer architecture, semiconductor technology and performance analysis. He currently works for Intel Corporation. Only comprehensive treatise on Alpha Architecture, chips and systems. Insider's view of Alpha A comprehensive discussion of Alpha with overviews of competing architectures.

The new RISC-V Edition of Computer Organization and Design features the RISC-V open source instruction set architecture, the first open source architecture designed to be used in modern computing environments such as cloud computing, mobile devices, and other embedded systems. With the post-PC era now upon us, Computer Organization and Design moves forward to explore this generational change with examples, exercises, and material highlighting the emergence of mobile computing and the Cloud. Updated content featuring tablet computers, Cloud infrastructure, and the x86 (cloud computing) and ARM (mobile computing devices) architectures is included. An online companion Web site provides advanced content for further study, appendices, glossary, references, and recommended reading. Features RISC-V, the first such architecture designed to be used in modern computing environments, such as cloud computing, mobile devices, and other embedded systems Includes relevant examples, exercises, and material highlighting the emergence of mobile computing and the cloud