The IEEE International Integrated Reliability Workshop (IIRW) originated from the Wafer Level Reliability Workshop in 1982 The IIRW focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems Tutorials, paper presentations, poster sessions, moderated discussion groups, special interest groups, and the informal format of the technical program provide a unique environment for understanding, developing, and sharing reliability technology and test methodologies for present and future semiconductor applications as well as ample opportunity for open discussions and interactions with colleagues

The IEEE International Integrated Reliability Workshop (IIRW) focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems Topics include resistive memories, high k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, III V, SOI, emerging memory technologies, transistor reliability including hot carriers and NBTI PBTI, root cause defects (physical mechanisms and simulations), Cu interconnects and low k dielectrics, impact of transistor degradation on circuit reliability, MEMS and sensor reliability, designing in reliability (products, circuits, systems, processes), customer product reliability requirements manufacturer reliability tasks, wafer level reliability tests (test approaches and reliability test structures), reliability modeling and simulation, optoelectronics, and single event upsets

he IIRW focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems

The IEEE International Integrated Reliability Workshop (IIRW) focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems Topics include resistive memories, high k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, III V, SOI, emerging memory technologies, transistor reliability including hot carriers and NBTI PBTI, root cause defects (physical mechanisms and simulations), Cu interconnects and low k dielectrics, impact of transistor degradation on circuit reliability, MEMS and sensor reliability, designing in reliability (products, circuits, systems, processes), customer product reliability requirements manufacturer reliability tasks, wafer level reliability tests (test approaches and reliability test structures), reliability modeling and simulation, optoelectronics, and single event upsets